Commit Graph

79576 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
ec572539dd Add TableGen support for callee saved registers.
Targets can now add CalleeSavedRegs defs to their *CallingConv.td file.
TableGen will use this to create a *_SaveList array suitable for
returning from getCalleeSavedRegs() as well as a *_RegMask bit mask
suitable for returning from getCallPreservedMask().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 22:46:58 +00:00
Andrew Trick
97af768ccc Test case rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 22:27:45 +00:00
Jakub Staszak
bda43e95a0 Move includes to the .cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148342 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 22:16:31 +00:00
Jim Grosbach
8b9300b972 MC tweak symbol difference resolution for non-local symbols.
When the non-local symbol in the expression is in the same fragment
as the second symbol, the assembler can still evaluate the expression
without needing a relocation.

For example, on ARM:
_foo:
	ldr lr, (_foo - 4)

rdar://10348687



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148341 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 22:14:39 +00:00
Jim Grosbach
283f1fff47 Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 22:03:42 +00:00
Devang Patel
2f8af1d643 Intel syntax: Fix parser match class to check memory operand size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:48:03 +00:00
Nadav Rotem
ba05c91ed2 Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:44:01 +00:00
Devang Patel
6220fea2a8 Intel syntax: Parse "BYTE PTR [RDX + RCX]"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:25:10 +00:00
Jakub Staszak
fced294599 Trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148332 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 20:58:08 +00:00
Dan Gohman
2f6263c96a Add a new ObjC ARC optimization pass to eliminate unneeded
autorelease push+pop pairs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148330 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 20:52:24 +00:00
Dan Gohman
7d4c87ef6e Add a new PassManagerBuilder customization point,
EP_ModuleOptimizerEarly, to allow passes to be added before the
main ModulePass optimizers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148329 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 20:51:32 +00:00
Devang Patel
bc51e501a0 Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148322 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 19:09:22 +00:00
Devang Patel
9a3d293cf3 Intel syntax: Do not unncessarily create plus expression for memory operand displacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 19:08:07 +00:00
Devang Patel
40bced0306 Intel syntax: Ignore mnemonic aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 18:30:45 +00:00
Eli Bendersky
aa2bb63d97 Remove "XFAIL: arm" from test/ExecutionEngine/test-return.ll
The test passes on ARM bots



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148315 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 18:21:05 +00:00
Devang Patel
d37ad247cc Intel syntax: Robustify memory operand parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 18:00:18 +00:00
Benjamin Kramer
f61f22a5d1 Add an LLDB data formatter script for llvm::SmallVector, maybe this is helpful to someone else.
This lets lldb give sane output for SmallVectors, e.g.
Before:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (llvm::SmallVectorImpl<int>) llvm::SmallVectorImpl<int> = {
    (llvm::SmallVectorTemplateBase<int>) llvm::SmallVectorTemplateBase<int> = {
      (llvm::SmallVectorTemplateCommon<int>) llvm::SmallVectorTemplateCommon<int> = {
        (llvm::SmallVectorBase) llvm::SmallVectorBase = {
          (void *) BeginX = 0x00007fff5fbff960
...
}

After:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (int) [0] = 42
  (int) [1] = 23
...
}

The script is still a bit rough so expect crashes for vectors of complex types.
Synthetic children are _not_ available in xcode 4.2, newer LLDBs should work though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148308 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 14:52:12 +00:00
Manuel Klimek
44b920fac4 Removes template magic to build up containers.
Instead, we now put the attributes of the container into members.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:34:07 +00:00
Nadav Rotem
a16d441430 Fix warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148301 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:31:09 +00:00
Eli Bendersky
a7f99f28a7 Additional ExecutionEngine tests, as part of bringing up the MCJIT on ELF
implementation.
Currently lit still executes ExecutionEngine tests with JIT (not MCJIT) by
default. MCJIT tests can be executed manually by calling llvm-lit with
--param jit_impl=mcjit



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:14:54 +00:00
Nadav Rotem
0b94b5f52b Fix 11769.
In CanXFormVExtractWithShuffleIntoLoad we assumed that EXTRACT_VECTOR_ELT can be later handled by the DAGCombiner.
However, in some cases on AVX, the EXTRACT_VECTOR_ELT is legalized to EXTRACT_SUBVECTOR + EXTRACT_VECTOR_ELT, which
currently is not handled by the DAGCombiner. In this patch I added a check that we only extract from the XMM part.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:13:19 +00:00
Craig Topper
d3b588965d Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148297 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 09:09:48 +00:00
Craig Topper
8b5a6b63dd Remove unnecessary AVX check from an assert. hasSSE2 is enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 08:23:44 +00:00
David Blaikie
58bd1510a4 Provide better messages in llvm_unreachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 07:00:13 +00:00
Andrew Trick
c6cf11b412 misched: Inital interface and implementation for ScheduleTopDownLive and ShuffleInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148291 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:55:07 +00:00
Andrew Trick
42b7a71dc7 Renamed MachineScheduler to ScheduleTopDownLive.
Responding to code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148290 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:55:03 +00:00
Andrew Trick
c1b1c7b205 Moving options declarations around.
More short term hackery until we have a way to configure passes that work on LiveIntervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148289 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:54:59 +00:00
Andrew Trick
0f080913d1 LSR fix: broaden the check for loop preheaders.
It's becoming clear that LoopSimplify needs to unconditionally create loop preheaders. But that is a bigger fix. For now, continuing to hack LSR.
Fixes rdar://10701050 "Cannot split an edge from an IndirectBrInst" assert.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148288 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 06:45:52 +00:00
Craig Topper
37c2677fbc Fix a crasher when PerformShiftCombine receives a BUILD_VECTOR of all UNDEF. Probably could use better handling in DAG combine or getNode. Fixes PR11772.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148285 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 04:44:50 +00:00
David Blaikie
fdebc38523 Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148284 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 04:43:56 +00:00
Rafael Espindola
21506061ef Add 148175 back. I am unable to reproduce any non determinism in a dragonegg
or clang bootstrap.

I will keep an eye on the bots.

Original message:
Only emit the Leh_func_endN symbol when needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148283 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 04:19:20 +00:00
Dylan Noblesmith
f214b80b8d Makefile: add missing files to FilesToConfig
And fix the comment about where the FilesToConfig variable
is.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148282 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 02:56:49 +00:00
Pete Cooper
f57e1c29dd Changed flag operand of ISD::FP_ROUND to TargetConstant as it should not get checked for legalisation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148275 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 01:54:07 +00:00
Chris Lattner
1752e45de9 add some missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 01:31:32 +00:00
Jakob Stoklund Olesen
ff5bad0787 Add portable bit mask operations to BitVector.
BitVector uses the native word size for its internal representation.
That doesn't work well for literal bit masks in source code.

This patch adds BitVector operations to efficiently apply literal bit
masks specified as arrays of uint32_t.  Since each array entry always
holds exactly 32 bits, these portable bit masks can be source code
literals, probably produced by TableGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148272 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 01:24:32 +00:00
Lang Hames
e02a17c4ef Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148268 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 00:39:29 +00:00
Jim Grosbach
e0934bee3a Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148265 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:58 +00:00
Jim Grosbach
020f4e861a ExecutionEngine interface to re-map addresses for engines that support it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:55 +00:00
Jim Grosbach
652ca2fe0c MCJIT handle a few more simple x86 relocations for MachO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148263 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:50:49 +00:00
David Blaikie
2dd674fdce Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.
(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148262 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:24:27 +00:00
Hal Finkel
17d2dbd5f9 Cleanup PPC RLWINM8 vs RLWINM
No test case: output assembly will be identical.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148261 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 23:22:50 +00:00
Hal Finkel
504d1d2fa4 AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:53:41 +00:00
Jakob Stoklund Olesen
c035c940a6 Extract method for detecting constant unallocatable physregs.
It is safe to move uses of such registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148259 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:34:08 +00:00
Jim Grosbach
61425c0a7f MCJIT support for non-function sections.
Move to a by-section allocation and relocation scheme. This allows
better support for sections which do not contain externally visible
symbols.

Flesh out the relocation address vs. local storage address separation a
bit more as well. Remote process JITs use this to tell the relocation
resolution code where the code will live when it executes.

The startFunctionBody/endFunctionBody interfaces to the JIT and the
memory manager are deprecated. They'll stick around for as long as the
old JIT does, but the MCJIT doesn't use them anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148258 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 22:26:39 +00:00
Stepan Dyatkovskiy
27bf56056b Fixed comment in loop-unswitch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 20:48:04 +00:00
Jakob Stoklund Olesen
63c6672423 Give better scavenger errors by invoking the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 20:38:31 +00:00
Jakob Stoklund Olesen
7739cad69d Add a new kind of MachineOperand: MO_RegisterMask.
Register masks will be used as a compact representation of large clobber
lists.  Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers.  That's more than 1kB of useless
operands per call site.

A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered.  The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().

By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.

This patch introduces the new operand kind.  Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 19:22:00 +00:00
Eli Friedman
1857b51ef5 Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148240 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 16:42:21 +00:00
Eli Friedman
a20b71518a Get rid of unused codegen-only instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148239 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 16:29:35 +00:00
Joe Abbey
a0c1fc3bd3 Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc...
Committed as obvious


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 13:16:05 +00:00