Commit Graph

92045 Commits

Author SHA1 Message Date
Nadav Rotem
ef3e423e23 Add an additional testcase for PR15882.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181646 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:55:44 +00:00
Reed Kotler
46090914b7 Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability. 

This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.

Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.

This is needed when returning float, double, single complex, double complex
in the Mips ABI.

Helper functions in libc for mips16 are available to do this.

For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.

Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.

This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.

The only register that is modified is ra in this call.

The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
Jordan Rose
1197e38f33 Micro-optimization: don't shift an entire bitcode record over to get the code.
Previously, BitstreamCursor read an abbreviated record by splatting the
whole thing into a data vector, then extracting and removing the /first/
element. Now, it reads the first element--the record code--separately from
the actual field values.

No (intended) functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181639 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:17:10 +00:00
David Blaikie
acd1d031b8 Give the test from r181632 a target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181637 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:14:39 +00:00
David Blaikie
4de9d72883 PR14492: Debug Info: Support for values of non-integer non-type template parameters.
This is only tested for global variables at the moment (& includes tests
for the unnamed parameter case, since apparently this entire function
was completely untested previously)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181632 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 21:52:07 +00:00
Jyotsna Verma
fd4ccda4a5 Fix unused variable error.
Earlier, this variable was used in an assert and was causing failure on
darwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 21:44:02 +00:00
Jyotsna Verma
cdfb55d15b Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181628 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 20:58:11 +00:00
Jyotsna Verma
1a35b8e2eb Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 20:27:34 +00:00
Rafael Espindola
ed9fc9b8ee Fix the R600 build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181621 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 18:31:42 +00:00
Chad Rosier
ffc49cbea4 [ms-inline asm] Fix a crasher when we fail on a direct match.
The issue was that the MatchingInlineAsm and VariantID args to the
MatchInstructionImpl function weren't being set properly.  Specifically, when
parsing intel syntax, the parser thought it was parsing inline assembly in the
at&t dialect; that will never be the case.  

The crash was caused when the emitter tried to emit the instruction, but the
operands weren't set.  When parsing inline assembly we only set the opcode, not
the operands, which is used to lookup the instruction descriptor.
rdar://13854391 and PR15945

Also, this commit reverts r176036.  Now that we're correctly parsing the intel
syntax the pushad/popad don't match properly.  I've reimplemented that fix using
a MnemonicAlias.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181620 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 18:24:17 +00:00
Rafael Espindola
6e53180db1 Remove unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 18:16:59 +00:00
Andrew Kaylor
50be71d182 Fix MCJITCAPITest.cpp unit test on Windows.
MCJIT on Windows requires an explicit target triple with "-elf" appended to generate objects in ELF format.  The common test framework was setting up this triple, but it wasn't passed to the C API in the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181614 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 17:58:41 +00:00
Alexander Kornienko
2e24e19cac Better output for long help strings for command-line options.
Summary:
This patch allows using \n inside long help strings for command-line
options, so that all lines are equally indented. This is not a perfect solution,
as we don't (and probably don't want to) know about terminal width, but it
allows to format long help strings somehow readable without manually padding
them with spaces. A motivating example is -help output from clang-format (source
code in tools/clang-format/ClangFormat.cpp, see cl options offset, length,
style, and dump-config).

Reviewers: atrick, alexfh

Reviewed By: alexfh

CC: llvm-commits, rafael

Differential Revision: http://llvm-reviews.chandlerc.com/D779

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 17:15:51 +00:00
Rafael Espindola
3a0d00eef9 Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 16:53:12 +00:00
Benjamin Kramer
7159a307b9 InstCombine: Don't claim to be able to evaluate any shl in a zexted type.
The shift amount may be larger than the type leading to undefined behavior.
Limit the transform to constant shift amounts. While there update the bits to
clear in the result which may enable additional optimizations.

PR15959.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 16:26:37 +00:00
Logan Chien
c24a374331 Implement AsmParser for ARM unwind directives.
This commit implements the AsmParser for fnstart, fnend,
cantunwind, personality, handlerdata, pad, setfp, save, and
vsave directives.

This commit fixes some minor issue in the ARMELFStreamer:

* The switch back to corresponding section after the .fnend
  directive.

* Emit the unwind opcode while processing .fnend directive
  if there is no .handlerdata directive.

* Emit the unwind opcode to .ARM.extab while processing
  .handlerdata even if .personality directive does not exist.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 16:17:24 +00:00
Aaron Ballman
2e2c12b996 XFAILing this test on Win32 to unbreak the build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 14:42:16 +00:00
Benjamin Kramer
768ebcdf63 DAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).
PR15948.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 14:09:52 +00:00
Benjamin Kramer
51dab6e394 InstCombine: Verify the type before transforming uitofp into select.
PR15952.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181586 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 09:16:52 +00:00
Tom Stellard
58e87a68a8 R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns
The BFE optimization was the only one we were actually using, and it was
emitting an intrinsic that we don't support.

https://bugs.freedesktop.org/show_bug.cgi?id=64201

Reviewed-by: Christian König <christian.koenig@amd.com>

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181580 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 02:09:45 +00:00
Tom Stellard
dde6836456 R600: Expand SUB for v2i32/v4i32
Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181579 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 02:09:39 +00:00
Tom Stellard
6c40d40d70 R600: Expand MUL for v4i32/v2i32
Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181578 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 02:09:34 +00:00
Tom Stellard
4fca5c1440 R600: Expand SRA for v4i32/v2i32
v2: Add v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181577 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 02:09:29 +00:00
Tom Stellard
bdd9b1e89f R600: Expand vselect for v4i32 and v2i32
v2: Add vselect v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry <awatry@gmail.com>

NOTE: This is a candidate for the 3.3 branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181576 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 02:09:24 +00:00
Chad Rosier
a70d02ff28 [x86AsmParser] It's valid to stop parsing an operand at an immediate.
rdar://13854369 and PR15944

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 23:48:53 +00:00
Owen Anderson
58dcd200b7 Teach SelectionDAG to constant fold all-constant FMA nodes the same way that it constant folds FADD, FMUL, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 22:27:13 +00:00
Dmitri Gribenko
2c694171a5 Fix a documentation warning: \bried -> \brief
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181551 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 21:16:18 +00:00
Dmitri Gribenko
01371af2c4 Documentation warning: \param, not \parm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181549 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 21:15:03 +00:00
Jordan Rose
d044f65e37 Rewrite assert to avoid warning when the record element type is byte-sized.
BitstreamWriter asserts that when blob data is written from the record
element vector, each element fits in a byte. However, if the record
elements are specified as a SmallVector of 'char', this causes a warning
from -Wtautological-constant-out-of-range-compare. Fix this by using
llvm::isUInt<8> instead of a plain comparison against 256.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181545 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 21:07:43 +00:00
Bill Wendling
edfef3bd27 Generate a compact unwind encoding in the face of a stack alignment push.
We generate a `push' of a random register (%rax) if the stack needs to be
aligned by the size of that register. However, this could mess up compact unwind
generation. In particular, we want to still generate compact unwind in the
presence of this monstrosity.

Check if the push of of the %rax/%eax register. If it is and it's marked with
the `FrameSetup' flag, then we can generate a compact unwind encoding for the
function only if the push is the last FrameSetup instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181540 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 20:10:38 +00:00
Jyotsna Verma
80d81aa8ba Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181535 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 19:16:07 +00:00
Shuxin Yang
4b7b3a7c19 [GVN] Split critical-edge on the fly, instead of postpone edge-splitting to next
iteration.
  
  This on step toward non-iterative GVN. My local hack suggests that getting rid
of iteration will speedup GVN by 30%+ on a medium sized input (2k LOC, C++).
I cannot explain why not 2x or more at this moment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181532 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 18:34:27 +00:00
Jyotsna Verma
f4f60b10e4 Hexagon: Use relation map for getMatchingCondBranchOpcode() and
getInvertedPredicatedOpcode() functions instead of switch cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 18:25:44 +00:00
Bill Wendling
1f4b796b49 Simplify the code a bit.
The compact unwind registers were defined in two different
places. It's better just to place them in the function that uses them
and specify that this is a 64-bit or 32-bit machine.

No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181529 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 18:21:45 +00:00
Rafael Espindola
95f885390b Don't replace an alias in llvm.used with its target.
When we replace an internal alias with its target, be careful not to
replace the entry in llvm.used (and llvm.compiler_used).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181524 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 17:22:59 +00:00
Richard Osborne
9bd913c4c1 [XCore] Fix handling of functions where only the LR is spilled.
Previously we only checked if the LR required saving if the frame size was
non zero. However because the caller reserves 1 word for the callee to use
that doesn't count towards our frame size it is possible for the LR to need
saving and for the frame size to be 0.

We didn't hit when the LR needed saving because of a function calls because
the 1 word of stack we must allocate for our callee means the frame size
is always non zero in this case. However we can hit this case if the LR is
clobbered in inline asm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 16:43:42 +00:00
Benjamin Kramer
a6ff92a975 InstCombine: Don't just copy known bits from the first operand of an srem.
That's obviously wrong. Conservatively restrict it to the sign bit, which
matches the original intention of this analysis. Fixes PR15940.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181518 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 16:32:32 +00:00
Rafael Espindola
4fcf82f316 Avoid runtime type checks.
In most cases the relocation type implies the object word size and
endianness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181515 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 15:10:36 +00:00
Benjamin Kramer
6ce62dc1d0 libDebugInfo depends on libObject nowadays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181510 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 13:48:26 +00:00
Rafael Espindola
bed93b0de1 Introduce convenience typedefs for the 4 ELF object types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181509 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 13:13:28 +00:00
Kai Nacke
a634d2f9dd Test commit.
Add one of my contributions to CREDITS.TXT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181508 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 12:32:36 +00:00
Rafael Espindola
167957fa09 Change getRelocationAdditionalInfo to be ELF only.
It was only implemented for ELF where it collected the Addend, so this
patch also renames it to getRelocationAddend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181502 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 03:39:05 +00:00
Eric Christopher
c496875f0c Revert "Make sure debug info contains linkage names (DW_AT_MIPS_linkage_name)"
temporarily while investigating gdb.cp/templates.exp.

This reverts commit r181471.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181496 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 00:42:33 +00:00
Arnold Schwaighofer
c121f5dc26 LoopVectorizer: Don't assert on the absence of induction variables
A computable loop exit count does not imply the presence of an induction
variable. Scalar evolution can return a value for an infinite loop.

Fixes PR15926.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181495 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 00:32:18 +00:00
Dmitri Gribenko
96e70b2a00 Use correct parameter names in comments [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181478 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 22:28:48 +00:00
Daniel Malea
f7f4184710 Revert 181475 as the DebugIR tests are breaking (automake) buildbots that re-use build dirs
- the temporaries "-debug.ll" files generated by DebugIR pass are considered tests, even though they are not



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181476 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 21:55:31 +00:00
Eric Christopher
cc55d4528c Make sure debug info contains linkage names (DW_AT_MIPS_linkage_name)
for constructors and destructors since the original declaration given
by the AT_specification both won't and can't.

Patch by Yacine Belkadi, I've cleaned up the testcases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181471 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 21:23:22 +00:00
Daniel Malea
0fd09cd99b DebugIR tests -- lit tests for the line number transform
- simple one-function case
- function-calling case
- external function calling case
- exception throwing case
- vector case

Note: these tests are somewhat coupled to the current format of debug metadata.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181469 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 21:03:00 +00:00
Daniel Malea
13ace6664f Add DebugIR pass -- emits IR file and replace source lines with IR lines in MD
- requires existing debug information to be present
- fixes up file name and line number information in metadata
- emits a "<orig_filename>-debug.ll" succinct IR file (without !dbg metadata
  or debug intrinsics) that can be read by a debugger
- initialize pass in opt tool to enable the "-debug-ir" flag
- lit tests to follow



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181467 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 20:44:14 +00:00
Daniel Malea
d0fef32e5f Pull up AssemblyWriter interface into header to allow subclassing
- made all functions virtual so that subclasses can specialize them
- add printInstructionLine so that subclasses can choose whether or not to
  print the newline character (without having to implement printBasicBlock()
- added a second constructor to AssemblyWriter that does not require a
  SlotTracker, as required in order to keep the SlotTracker helper class outside
  AsmWriter.h and buried in the implementation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181466 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08 20:38:31 +00:00