Chris Lattner
235e2f6a68
implement some more easy hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 06:22:33 +00:00
Chris Lattner
bf16faa16a
Implement some hooks, make printOperand abort if unknown modifiers are
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present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 06:15:28 +00:00
Chris Lattner
c6b8a99207
t2MOVi32imm is currently always lowered by the Thumb2ITBlockPass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 05:58:02 +00:00
Daniel Dunbar
b576beaaa8
PowerPC ifdef'ing considered more complicated than one might like.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84603 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 05:33:23 +00:00
Daniel Dunbar
2685a29a8d
Wire up the ARM MCInst printer, for llvm-mc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84600 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 05:15:36 +00:00
Dan Gohman
07adb85cb7
Re-apply r84295, with fixes to how the loop "top" and "bottom" blocks are
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tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84598 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:50:37 +00:00
Evan Cheng
5f4fb86d58
Trim unnecessary includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:23:20 +00:00
Dan Gohman
81b16a3558
Add getTopBlock and getBottomBlock member functions to MachineLoopInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84596 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:16:37 +00:00
Nick Lewycky
13555eae17
Correct test for PowerPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84595 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 04:09:50 +00:00
Daniel Dunbar
9a6d88d38b
Revert "Tweak top-level Makefile to facilitate Apple-style build.", this is
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breaking Clang's Apple-style build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 02:23:13 +00:00
Daniel Dunbar
9fb0b7ef35
NNT: Remove duplicate verbose print.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 02:23:05 +00:00
Jim Grosbach
8fa4efeabf
Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
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functions are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84587 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:32:47 +00:00
Evan Cheng
0222a8cfb8
If the physical register being spilled does not have an interval, spill its sub-registers instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:31:09 +00:00
Jim Grosbach
7e831db1d4
Enable post-pass frame index register scavenging for ARM and Thumb2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:26:58 +00:00
Chris Lattner
161dcbf799
lower ARM::MOVi32imm properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84583 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 01:11:37 +00:00
Chris Lattner
292df8eb1f
add support for external symbols. The mc instprinter can now handle
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reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing
identical output except for superior formatting of constant pool entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84582 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:56:16 +00:00
Chris Lattner
96bc2173bb
get fancy: support basic block operands. Yay for jumps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84579 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:52:47 +00:00
Chris Lattner
233917c072
add supprort for the 'sbit' operand, MOVi apparently has one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:46:11 +00:00
Chris Lattner
413ae25fb5
add support for instruction predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84575 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:42:49 +00:00
Chris Lattner
017d9478d5
implement printSORegOperand, add lowering for the nasty and despicable MOVi2pieces :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:40:56 +00:00
Jim Grosbach
1fc1dc0682
Refs: A8-598.
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Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.
Patch by Johnny Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84572 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:38:19 +00:00
Jim Grosbach
780d207d1c
Add missing encoding bits to NLdSt class of instructions.
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Patch by Johnny Chen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84570 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20 00:19:08 +00:00
Chris Lattner
af0df67d2b
X86 should ignore implicit regs when lowering to MCInst also,
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no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84567 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 23:35:57 +00:00
Chris Lattner
306d14f9aa
handle addmode4 modifiers, fix a fixme in printRegisterList
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by ignoring all implicit regs when lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 23:31:43 +00:00
Chris Lattner
84d8bf9d28
simplify by using the twine form of GetOrCreateSymbol
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 23:05:23 +00:00
Oscar Fuentes
8e6323c8b9
Updated cmake library dependencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84564 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 23:00:00 +00:00
Jim Grosbach
6009751244
Enable allocation of R3 in Thumb1
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:57:03 +00:00
Chris Lattner
5a207897bc
use EmitLabel instead of text emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84562 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:51:16 +00:00
Chris Lattner
7c5b021793
add a twine version of MCContext::GetOrCreateSymbol.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84561 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:49:00 +00:00
Chris Lattner
a70e644820
lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries
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like:
@ BB#1:
.align 2
LCPI1_0:
.long L_.str-(LPC0+8)
Note that proper indentation of the label :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:33:05 +00:00
Jim Grosbach
d482f55af1
Adjust the scavenge register spilling to allow the target to choose an
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appropriate restore location for the spill as well as perform the actual
save and restore.
The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84554 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:27:30 +00:00
Chris Lattner
4d15222341
add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84553 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:23:04 +00:00
Owen Anderson
d41ed4e2c4
Refactor lookup_or_add to contain _MUCH_ less duplicated code. Add support for
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numbering first class aggregate instructions while we're at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:14:22 +00:00
Chris Lattner
e306d8d6cc
add register list and hacked up addrmode #4 support, we now get this:
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_main:
stmsp! sp!, {r7, lr}
mov r7, sp
sub sp, sp, #4
mov r0, #0
str r0, [sp]
ldr r0, LCPI1_0
bl _printf
ldr r0, [sp]
mov sp, r7
ldmsp! sp!, {r7, pc}
Note the unhappy ldm/stm because of modifiers being ignored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 22:09:23 +00:00
Chris Lattner
3310a963cf
revert r84540, fixing build breakage I didn't see because of
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broken makefile deps :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84544 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:59:25 +00:00
Chris Lattner
084f87d445
add addrmode2 support, getting us up to:
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_main:
stm ,
mov r7, sp
sub sp, sp, #4
mov r0, #0
str r0, [sp]
ldr r0, LCPI1_0
bl _printf
ldr r0, [sp]
mov sp, r7
ldm ,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:57:05 +00:00
Chris Lattner
6f99776f6c
add jump tables, constant pools and some trivial global
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lowering stuff. We can now compile hello world to:
_main:
stm ,
mov r7, sp
sub sp, sp, #4
mov r0, #0
str r0,
ldr r0,
bl _printf
ldr r0,
mov sp, r7
ldm ,
Almost looks like arm code :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:53:00 +00:00
Victor Hernandez
93bb60d379
Malloc calls are marked NoAlias, so the code below the isMalloc() check makes it redundant. Removing the isMalloc() check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84541 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:47:22 +00:00
Chris Lattner
83e43ca1b6
pass mangler in as a reference instead of a pointer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:45:31 +00:00
Mikhail Glushenkov
ccef6dec0c
More refactoring...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:24:28 +00:00
Chris Lattner
8514e21deb
reduce #includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:23:15 +00:00
Chris Lattner
61d35c273e
add printing support for SOImm operands, getting us to:
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_main:
stm ,
mov r7, sp
sub sp, sp, #4
mov r0, #0
str r0,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84535 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:21:39 +00:00
Owen Anderson
158d86e5b0
Simplify some code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 21:14:57 +00:00
Chris Lattner
8bc86cba60
wire up some basic printOperand goodness, giving us stuff like this before
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we abort:
_main:
stm ,
mov r7, sp
sub sp, sp,
mov r0,
str r0,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84532 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 20:59:55 +00:00
Chris Lattner
9cf0eb5e58
add the files that go with the previous rev
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84531 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 20:21:05 +00:00
Chris Lattner
97f0693744
wire up skeletal support for having llc print instructions
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through mcinst lowering -> mcinstprinter, when llc is passed
the -enable-arm-mcinst-printer flag. Currently this
is very "aborty".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 20:20:46 +00:00
Owen Anderson
59d5aac0b4
Banish ConstantsLock. It's serving no purpose other than slowing things down
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at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 20:11:52 +00:00
Chris Lattner
6a71afaec1
wire up ARM's printMCInst method. Now llvm-mc should be able to produce
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"something" when printing MCInsts, it will just be missing all the
operand info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84528 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 19:59:05 +00:00
Chris Lattner
fd60382e75
stub out a minimal ARMInstPrinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84527 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 19:56:26 +00:00
Chris Lattner
172862a2a7
remove strings from instructions who are never asmprinted.
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All of these "subreg32" modifier instructions are handled
explicitly by the MCInst lowering phase. If they got to
the asmprinter, they would explode. They should eventually
be replace with correct use of subregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-19 19:51:42 +00:00