Commit Graph

109667 Commits

Author SHA1 Message Date
Ahmed Bougacha
f44d4cd925 [X86] Add missing FMA3 VFMADDSUB in the emitter.
Also reuse the fma4 intrinsic test to cover fma3 instructions too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221487 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 21:58:11 +00:00
David Majnemer
c4e8fb94df Object, COFF: Don't consider AuxFunctionDefinition for getSymbolSize
mingw lies about the size of a function's AuxFunctionDefinition.  Ignore
the field and rely on our heuristic to determine the symbol's size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221485 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 21:46:55 +00:00
Ahmed Bougacha
8b6319bfed [X86] Split FMA4 RM tests into a separate file. NFC.
While there, remove useless comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 21:46:23 +00:00
Rafael Espindola
d8eb4f1912 Base check on the section name, not the variable name.
The variable is private, so the name should not be relied on. Also, the
linker uses the sections, so asan should too when trying to avoid causing
the linker problems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221480 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 20:01:34 +00:00
Lang Hames
0ea3b243b0 [RegAlloc] Remove reference to the trivial spiller in test case.
This test case was never actually testing the trivial spiller: the -spiller
option has not been hooked up for a while now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221475 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:24:18 +00:00
Lang Hames
4e2cbd5158 [RegAlloc] Kill off the trivial spiller - nobody is using it any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:12:38 +00:00
Michael Liao
14f5cb6f9a Indentation fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221472 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:05:57 +00:00
Frederic Riss
2dc0735049 Try to appease MSVC buildbots after r221466.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221471 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:00:47 +00:00
Kevin Enderby
3b80486e3a Plumb in the ARM thumb symbolizer in llvm-objdump’s Mach-O disassembler and
add the code and test cases for 32-bit ARM symbolizer.

Also fixed the printing of data in code as it was not using the table correctly
and needed to fix one of the test cases too.

This will break lld’s test/mach-o/arm-interworking-movw.yaml till the tweak
for that is made. Which I’ll be committing immediately after this commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221470 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 19:00:13 +00:00
Frederic Riss
6df2a3be33 Change DIBuilder::createImportedDeclaration from taking a DIScope to a DIDescriptor.
Imported declarations can be DIGlobalVariables which aren't a DIScope. Today
clang (unknowingly I believe) shoehorns these into a DIScope and it all works
just because we never access the fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221466 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 17:46:55 +00:00
Colin LeMahieu
d67fc42d22 [Hexagon] Adding basic Hexagon ELF object emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221465 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 17:05:51 +00:00
Eli Bendersky
9b644c8749 Clean up NVPTXLowerStructArgs.cpp. NFC
* Remove unnecessary const_casts and C-style casts
* Simplify attribute access code
* Simplify ArrayRef creation
* 80-col and clang-format



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221464 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 17:05:49 +00:00
Daniel Sanders
0d9e067f5a [mips] Removed IsSoftFloat from MipsISelLowering::analyzeCallOperands(). NFC
Summary:
It isn't used anymore.

Depends on D6081

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6083

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221463 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 16:48:57 +00:00
Chad Rosier
e15b20eb13 [Reassociate] Don't reassociate when mixing regular and fast-math FP
instructions.  Inlining might cause such cases and it's not valid to
reassociate floating-point instructions without the unsafe algebra flag.

Patch by Mehdi Amini <mehdi_amini@apple.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221462 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 16:46:37 +00:00
Daniel Sanders
20e3be7972 [mips] Removed MipsISelLowering::analyzeFormalArguments() in favour of CCState::AnalyzeFormalArguments()
Summary:
As with returns, we must be able to identify f128 arguments despite them
being lowered away. We do this with a pre-analyze step that builds a
vector and then we use this vector from the tablegen-erated code.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6081

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221461 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 16:36:30 +00:00
Rafael Espindola
4396b44b9a Use FileCheck in a few tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 15:05:51 +00:00
Rafael Espindola
eed959015b Compute the correct jump table entries on 32 bit windows.
On 32 bit windows we use label differences and .set does not suppress
rolocations, a combination that was not used before r220256.

This fixes PR21497.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221456 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:39:49 +00:00
Andrea Di Biagio
f0f66a254d [X86] When commuting SSE immediate blend, make sure that the new blend mask is a valid imm8.
Example:
define <4 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
  ret <4 x i32> %shuffle
}

Before llc (-mattr=+sse4.1), produced the following assembly instruction:
  pblendw $4294967103, %xmm1, %xmm0

After
  pblendw $63, %xmm1, %xmm0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221455 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:36:45 +00:00
Aaron Ballman
22cfcb2469 Fixing some -Wcast-qual warnings; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221454 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:32:30 +00:00
Toma Tabacu
7f22a20351 [mips] Tolerate the use of the %z inline asm operand modifier with non-immediates.
Summary:
Currently, we give an error if %z is used with non-immediates, instead of continuing as if the %z isn't there.

For example, you use the %z operand modifier along with the "Jr" constraints ("r" makes the operand a register, and "J" makes it an immediate, but only if its value is 0). 
In this case, you want the compiler to print "$0" if the inline asm input operand turns out to be an immediate zero and you want it to print the register containing the operand, if it's not.

We give an error in the latter case, and we shouldn't (GCC also doesn't).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6023

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 14:25:42 +00:00
Sasa Stankovic
2b8f96996b [mips] Add the following MIPS options that control gp-relative addressing of
small data items: -mgpopt, -mlocal-sdata, -mextern-sdata. Implement gp-relative
addressing for constants.

Differential Revision: http://reviews.llvm.org/D4903


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221450 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 13:20:12 +00:00
Toma Tabacu
ea60f51d87 [mips] Improve error/warning messages and testing for the .cpload assembler directive.
Summary:
Improved warning message when using .cpload inside a reorder section and added an error message for using .cpload with Mips16 enabled.
Modified the tests to fit with the changes mentioned above, added a test-case for the N32 ABI in cpload.s and did some reformatting to make the tests easier to read.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5465

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221447 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 10:02:45 +00:00
Daniel Sanders
10f28ec3ef [JIT] Fix more missing endian conversions (opcodes for AArch64, ARM, and Mips stub functions, and ARM target in general)
Summary:
Fixed all of the missing endian conversions that Lang Hames and I identified in
RuntimeDyldMachOARM.h.

Fixed the opcode emission in RuntimeDyldImpl::createStubFunction() for AArch64,
ARM, Mips when the host endian doesn't match the target endian.
PowerPC will need changing if it's opcodes are affected by endianness but I've
left this for now since I'm unsure if this is the case and it's the only path
that specifies the target endian.

This patch fixes MachO_ARM_PIC_relocations.s on a big-endian Mips host. This
is the last of the known issues on this host.

Reviewers: lhames

Reviewed By: lhames

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D6130

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221446 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 09:53:05 +00:00
David Majnemer
42b17f97cf Object, COFF: Infer symbol sizes from adjacent symbols
Use the position of the subsequent symbol in the object file to infer
the size of it's predecessor.  I hope to eventually remove whatever COFF
specific details from this little algorithm so that we can unify this
logic with what Mach-O does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221444 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 08:10:41 +00:00
David Majnemer
a67e1693fc X86, MC: Tidy up some whitespace in GetRelocType
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221443 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 08:10:37 +00:00
Justin Bogner
03e3dfd20a GCOV: Make sure that function idents in the .gcda and .gcno match
When generating gcov compatible profiling, we sometimes skip emitting
data for functions for one reason or another. However, this was
emitting different function IDs in the .gcno and .gcda files, because
the .gcno case was using the loop index before skipping functions and
the .gcda the array index after. This resulted in completely invalid
gcov data.

This fixes the problem by making the .gcno loop track the ID
separately from the loop index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221441 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 06:55:02 +00:00
Rafael Espindola
58de7099c7 Add three other sections when L symbols are allowed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221436 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 05:01:21 +00:00
Rafael Espindola
e1f22e397d Allow L symbols in no_dead_strip sections.
If a section cannot be dead stripped, it is safe to use L symbols, since
the linker will keep all of it in the end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221431 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 02:42:03 +00:00
Quentin Colombet
d465eced34 [X86] Lower VSELECT into SHRUNKBLEND when we shrink the bits used into the
condition to match a blend.
This prevents optimizations that work on VSELECT to perform invalid
transformations. Indeed, the optimized condition does not match the vector
boolean content that is expected and bad things may happen.

This patch yields the exact same code on the whole test-suite + specs (-O3 and
-O3 -march=core-avx2), it improves one test case (vector-blend.ll) and fixes a
bug reduced in vselect-avx.ll.

<rdar://problem/18819506>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221429 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 02:25:03 +00:00
Matt Arsenault
4ebcbd0af7 Remove unnecessary .c_str() when implicitly converting to Twine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 01:13:27 +00:00
Lang Hames
6c100e7428 [Docs][JIT] Update the clang++ invocation lines in the kaleidoscope docs.
The old examples had missing/incorrect flags that were causing failures on newer
versions of clang and the tutorial code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221419 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-06 00:31:04 +00:00
Petar Jovanovic
5940390ece [mips64] Fix MIPS64 exception personality encoding
Remove dynamic relocations of __gxx_personality_v0 from the .eh_frame.
The MIPS64 follow-up of the MIPS32 fix (rL209907).

Patch by Vladimir Stefanovic.

Differential Revision: http://reviews.llvm.org/D6141


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221408 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 22:42:31 +00:00
Simon Pilgrim
3f1d66fe93 [X86][SSE] Vector integer to float conversion memory folding
Added missing memory folding for the (V)CVTDQ2PS instructions - we can safely fold these (but not the (V)CVTDQ2PD versions which have a register/memory size discrepancy in the source operand). I've added a test case demonstrating that stack folding now works.

Differential Revision: http://reviews.llvm.org/D5981



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221407 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 22:28:25 +00:00
Sean Silva
39113744ca [docs] Document usage of Inputs/ for extra test files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 22:17:18 +00:00
Sean Silva
212f3ab5ea [Linker] Add some test coverage for llvm.ident merging
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221403 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 21:33:34 +00:00
Michael Ilseman
9f59bc4a0d Fix heap-use-after-free bug in expandSDiv when the operands are
constants, as discovered by ASAN.

Patch by Mehdi Amini!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 21:28:24 +00:00
Steven Wu
36c4749c19 Remove obsolete ARM intrinsics vclz and vcnt
Both of the intrinsics get autoupgraded to target independent
intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221396 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 21:02:55 +00:00
Simon Atanasyan
5563be0f4f Add accessor to get 'visibility' part of st_other field
This new `getVisibility()` function will also be used in the LLD code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221392 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 20:47:35 +00:00
Derek Schuff
65c7979555 Fix test breakage from r221386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 20:02:05 +00:00
Matt Arsenault
ecb144e2d1 R600/SI: Fix omod display for VOP3b
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:35:00 +00:00
Derek Schuff
07ffcb1007 [x86 fast-isel] Materialize allocas with the correct-sized lea for ILP32
Summary:
X86FastISel::fastMaterializeAlloca was incorrectly conditioning its
opcode selection on subtarget bitness rather than pointer size.

Differential Revision: http://reviews.llvm.org/D6136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:27:21 +00:00
Matt Arsenault
e7a8e298fb R600/SI: Add testcase I forgot to commit from months ago
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221384 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:01:22 +00:00
Matt Arsenault
d8586375b8 R600/SI: Move all rsrc building functions to SIISelLowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221383 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:01:19 +00:00
Matt Arsenault
12bd9f11c0 R600/SI: Remove SI_ADDR64_RSRC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 19:01:17 +00:00
Justin Holewinski
e459c0bf65 [NVPTX] Add NVPTXLowerStructArgs pass
This works around the limitation that PTX does not allow .param space
loads/stores with arbitrary pointers.

If a function has a by-val struct ptr arg, say foo(%struct.x *byval %d), then
add the following instructions to the first basic block :

%temp = alloca %struct.x, align 8
%tt1 = bitcast %struct.x * %d to i8 *
%tt2 = llvm.nvvm.cvt.gen.to.param %tt2
%tempd = bitcast i8 addrspace(101) * to %struct.x addrspace(101) *
%tv = load %struct.x addrspace(101) * %tempd
store %struct.x %tv, %struct.x * %temp, align 8

The above code allocates some space in the stack and copies the incoming
struct from param space to local space. Then replace all occurences of %d
by %temp.

Fixes PR21465.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 18:19:30 +00:00
Duncan P. N. Exon Smith
bad06b13ba IR: MDNode => Value: NamedMDNode::getOperator()
Change `NamedMDNode::getOperator()` from returning `MDNode *` to
returning `Value *`.  To reduce boilerplate at some call sites, add a
`getOperatorAsMDNode()` for named metadata that's expected to only
return `MDNode` -- for now, that's everything, but debug node named
metadata (such as llvm.dbg.cu and llvm.dbg.sp) will soon change.  This
is part of PR21433.

Note that there's a follow-up patch to clang for the API change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221375 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 18:16:03 +00:00
Sanjay Patel
4a6537c0a9 remove extra breaks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 18:00:07 +00:00
Duncan P. N. Exon Smith
ee6433511d IR: MDNode => Value: AsmWriter SlotTracker API
Change `SlotTracker::CreateMetadataSlot()` and
`SlotTracker::getMetadataSlot()` to use `Value` instead of `MDNode`.
Part of PR21433.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:56:28 +00:00
Tilmann Scheller
463e275e3e [ARM] Remove more dead code.
Dead code identified by the Clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221372 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:45:04 +00:00
Zoran Jovanovic
cd2d40cef6 ps][microMIPS] Implement CodeGen support for ANDI16 instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-05 17:43:00 +00:00