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8794 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
f8ad5bcdb5 Add test case for the phi reuse patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91642 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 00:11:44 +00:00
Sean Callanan
108934c65d Instruction fixes, added instructions, and AsmString changes in the 
X86 instruction tables.

Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.

This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.

* X86*.td
	Removed tabs and fixed 80-line violations

* X86Instr64bit.td
	(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
		Added
	(CALL, CMOV) Added qualifiers
	(JMP) Added PC-relative jump instruction
	(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
		that it is 64-bit only (ambiguous since it has no
		REX prefix)
	(MOV) Added rr form going the other way, which is encoded
		differently
	(MOV) Changed immediates to offsets, which is more correct;
		also fixed MOV64o64a to have to a 64-bit offset
	(MOV) Fixed qualifiers
	(MOV) Added debug-register and condition-register moves
	(MOVZX) Added more forms
	(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
		(as with MOV) are encoded differently
	(ROL) Made REX.W required
	(BT) Uncommented mr form for disassembly only
	(CVT__2__) Added several missing non-intrinsic forms
	(LXADD, XCHG) Reordered operands to make more sense for
		MRMSrcMem
	(XCHG) Added register-to-register forms
	(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
	(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
		Added
* X86InstrFPStack.td
	(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
	 FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
	 FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
	 FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
	 FXRSTOR)
		Added
	(FCOM, FCOMP) Added qualifiers
	(FSTENV, FSAVE, FSTSW) Fixed opcode names
	(FNSTSW) Added implicit register operand
* X86InstrInfo.td
	(opaque512mem) Added for FXSAVE/FXRSTOR
	(offset8, offset16, offset32, offset64) Added for MOV
	(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
	 LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
	 LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
	 LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
	 CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
	 SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
	 VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
	 VMWRITE, VMXOFF, VMXON) Added
	(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
	(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
	 JGE, JLE, JG, JCXZ) Added 32-bit forms
	(MOV) Changed some immediate forms to offset forms
	(MOV) Added reversed reg-reg forms, which are encoded
		differently
	(MOV) Added debug-register and condition-register moves
	(CMOV) Added qualifiers
	(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
	(BT) Uncommented memory-register forms for disassembler
	(MOVSX, MOVZX) Added forms
	(XCHG, LXADD) Made operand order make sense for MRMSrcMem
	(XCHG) Added register-register forms
	(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
	(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
	change

* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
  qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91638 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-18 00:01:26 +00:00
Eli Friedman
b17cb06c35 Allow instcombine to combine "sext(a) >u const" to "a >u trunc(const)". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91631 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 22:42:29 +00:00
Eli Friedman
8e4b197e0b Make the ptrtoint comparison simplification work if one side is a global. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91624 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 21:27:47 +00:00
Eli Friedman
0c826d98b3 Slightly generalize transformation of memmove(a,a,n) so that it also applies 
to memcpy. (Such a memcpy is technically illegal, but in practice is safe
and is generated by struct self-assignment in C code.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91621 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 21:07:31 +00:00
Bob Wilson
39c88a641b Re-revert 91459. It's breaking the x86_64 darwin bootstrap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91607 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 18:34:24 +00:00
Mikhail Glushenkov
994dbe0073 Add a 'set_option' action for use in OptionPreprocessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91594 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 07:49:16 +00:00
Eli Friedman
e8e17833be Aggressively flip compare constant expressions where appropriate; constant 
folding in particular expects null to be on the RHS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91587 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 06:07:04 +00:00
Evan Cheng
4c2b001f13 Revert this dag combine change: 
Fold (zext (and x, cst)) -> (and (zext x), cst)

DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-17 00:40:05 +00:00
Daniel Dunbar
2674089cef Reapply r91459, it was only unmasking the bug, and since TOT is still broken having it reverted does no good. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91559 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 20:09:53 +00:00
Daniel Dunbar
fca55c8ac7 Revert "Reapply 91184 with fixes and an addition to the testcase to cover the 
problem", this broke llvm-gcc bootstrap for release builds on
x86_64-apple-darwin10.

This reverts commit db22309800b224a9f5f51baf76071d7a93ce59c9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 10:56:17 +00:00
Chris Lattner
24604110ef reapply my strstr optimization. I have reproduced the x86-64 bootstrap 
miscompile (i386.o miscompares) but it happens both with and without
this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91532 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 09:32:05 +00:00
Nick Lewycky
0588bcef8d Make this test pass on Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91521 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 07:35:25 +00:00
Devang Patel
978b75ee50 XFAIL on ppc-darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91495 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 02:11:38 +00:00
Evan Cheng
2e489c4f9d Re-enable 91381 with fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91489 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 00:53:11 +00:00
Chris Lattner
0001517d9d revert my strstr optimization, I'm told it breaks x86-64 bootstrap. 
Will reapply with a fix when I get a chance.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91486 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 00:46:02 +00:00
Dale Johannesen
fc49bd2447 Do better with physical reg operands (typically, from inline asm) 
in local register allocator.  If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg.  If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.

Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also).  This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted.  However, there should normally be
no spilling within inline asm blocks.  The patch here goes a long way
towards making this actually be true.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-16 00:29:41 +00:00
Bob Wilson
970eaf2520 Reapply 91184 with fixes and an addition to the testcase to cover the problem 
found last time.  Instead of trying to modify the IR while iterating over it,
I've change it to keep a list of WeakVH references to dead instructions, and
then delete those instructions later.  I also added some special case code to
detect and handle the situation when both operands of a memcpy intrinsic are
referencing the same alloca.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91459 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 22:00:51 +00:00
Chris Lattner
ad6b1fdaf9 optimize strstr, PR5783 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91438 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 19:14:40 +00:00
Mikhail Glushenkov
f8bc1e4b27 Convert llvmc tests to FileCheck. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91420 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 07:21:14 +00:00
Mikhail Glushenkov
545f96814b Support hook invocation from 'append_cmd'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91419 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 07:20:50 +00:00
Kenneth Uildriks
76df3f398c For fastcc on x86, let ECX be used as a return register after EAX and EDX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91410 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:27:52 +00:00
Evan Cheng
d7760a4905 Disable 91381 for now. It's miscompiling ARMISelDAG2DAG.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91405 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:07:11 +00:00
Mikhail Glushenkov
e4ac23a0ff Validate the generated C++ code in llvmc tests. 
Checks that the code generated by 'tblgen --emit-llvmc' can be actually
compiled. Also fixes two bugs found in this way:

- forward_transformed_value didn't work with non-list arguments
- cl::ZeroOrOne is now called cl::Optional

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91404 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:04:52 +00:00
Mikhail Glushenkov
b5fab402d0 Pipe 'grep' output to 'count'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91403 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:04:14 +00:00
Mikhail Glushenkov
abf2d986c9 Allow $CALL(Hook, '$INFILE') for non-join tools. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91402 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:04:02 +00:00
Evan Cheng
9818c043d2 Make 91378 more conservative. 
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 03:00:32 +00:00
Evan Cheng
ad9c0a3d8b Use sbb x, x to materialize carry bit in a GPR. The result is all one's or all zero's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91381 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 00:53:42 +00:00
Evan Cheng
8acb3100de Fold (zext (and x, cst)) -> (and (zext x), cst). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 00:52:11 +00:00
Evan Cheng
99b653c36f Propagate zest through logical shift. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-15 00:41:36 +00:00
Dan Gohman
2e141d744e Fix integer cast code to handle vector types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 23:40:38 +00:00
Eric Christopher
38e1074c53 Add radar fixed in comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91312 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 19:07:25 +00:00
Shantonu Sen
bc1c99c4fb Remove empty file completely 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91277 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 14:15:15 +00:00
Chris Lattner
a59adc4015 revert r91184, because it causes a crash on a .bc file I just 
sent to Bob.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91268 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 05:11:02 +00:00
Mikhail Glushenkov
0898d7d4a5 Add a test for the 'init' option property. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91259 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-14 04:06:38 +00:00
Evan Cheng
dd99f3a7dc Disable r91104 for x86. It causes partial register stall which pessimize code in 32-bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 20:03:14 +00:00
Benjamin Kramer
7b3f1a21ea Fix some CHECK lines which were ignored by accident. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91214 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-12 09:25:50 +00:00
Bob Wilson
73a1b67cb9 Revise scalar replacement to be more flexible about handle bitcasts and GEPs. 
While scanning through the uses of an alloca, keep track of the current offset
relative to the start of the alloca, and check memory references to see if
the offset & size correspond to a component within the alloca.  This has the
nice benefit of unifying much of the code from isSafeUseOfAllocation,
isSafeElementUse, and isSafeUseOfBitCastedAllocation.  The code to rewrite
the uses of a promoted alloca, after it is determined to be safe, is
reorganized in the same way.

Also, when rewriting GEP instructions, mark them as "in-bounds" since all the
indices are known to be safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91184 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 23:47:40 +00:00
Anton Korobeynikov
8d1ffbd1ad Lower setcc branchless, if this is profitable. 
Based on the patch by Brian Lucas!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91175 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 23:01:29 +00:00
Dan Gohman
87862e77bb Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 21:31:27 +00:00
Dan Gohman
192db0027c Change this to the correct PR number. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91148 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 20:09:21 +00:00
Dan Gohman
050959cd08 Make getUniqueExitBlocks's precondition assert more precise, to 
avoid spurious failures. This fixes PR5758.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91147 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 20:05:23 +00:00
Dan Gohman
a4f9cc4e55 Fix the result type of SELECT nodes lowered from Select instructions with 
aggregate return values. This fixes PR5754.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91145 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 19:50:50 +00:00
Anton Korobeynikov
817a46454a Honour setHasCalls() set from isel. 
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 19:39:55 +00:00
Evan Cheng
50d070561e Tests for 91103 and 91104. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91105 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-11 06:02:21 +00:00
Eric Christopher
072f6fe196 Add a test for the fix in revision 91009. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91062 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-10 21:11:40 +00:00
Evan Cheng
6fd78ec8a2 It's not safe to coalesce a move where src and dst registers have different subregister indices. e.g.: 
%reg16404:1<def> = MOV8rr %reg16412:2<kill>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91061 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-10 20:59:45 +00:00
Chris Lattner
16f244e982 Fix PR5744, a case where we were getting the pointer size instead of the 
value size.  This only manifested when memdep inprecisely returns clobber,
which is do to a caching issue in the PR5744 testcase.  We can 'efficiently
emulate' this by using '-no-aa'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91004 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-10 00:11:45 +00:00
Evan Cheng
ce72f3fbdf Fix test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90988 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-09 22:24:42 +00:00
Evan Cheng
c363094e04 Optimize splat of a scalar load into a shuffle of a vector load when it's legal. e.g. 
vector_shuffle (scalar_to_vector (i32 load (ptr + 4))), undef, <0, 0, 0, 0>
=>
vector_shuffle (v4i32 load ptr), undef, <1, 1, 1, 1>

iff ptr is 16-byte aligned (or can be made into 16-byte aligned).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90984 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-12-09 21:00:30 +00:00