Commit Graph

463 Commits

Author SHA1 Message Date
Chris Lattner
44e05080f8 Bill's change in r95336 broke empty aggregates embedded
in other types.  fix this by only bumping zero-byte globals
up to a single byte if the *entire global* is zero size,
fixing PR6340.

This also fixes empty arrays etc to be handled correctly,
and only does this on subsection-via-symbols targets (aka
darwin) which is the only place where this matters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 06:20:21 +00:00
Dan Gohman
9f23dee08c Start function numbering at 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101638 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-17 16:29:15 +00:00
Chris Lattner
d2075586c8 add newlines at the end of files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:53:17 +00:00
Dale Johannesen
b39b7e5ebf Split big test into multiple directories to cater to
those who don't build all targets.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100688 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:43:35 +00:00
Evan Cheng
db8771af28 After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted.
rdar://7819990


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 02:21:24 +00:00
Chris Lattner
ba47ce1244 add some nounwinds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99752 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 07:58:37 +00:00
Chris Lattner
cf3fed0fd4 this takes an insane amount of time to run, disable it for now (PR6727)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 07:58:09 +00:00
Duncan Sands
d2c817eff1 Turn calls to copysignl into an FCOPYSIGN node. Handle FCOPYSIGN nodes
with ppc_f128 type by having the type legalizer turn these back into a
call to copysignl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 21:08:40 +00:00
Chris Lattner
3b9d6216a4 fix AsmPrinter::GetBlockAddressSymbol to always return a unique
label instead of trying to form one based on the BB name (which
causes collisions if the name is empty).  This fixes PR6608


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 17:53:23 +00:00
Chris Lattner
63d7836267 get MMI out of the label uniquing business, just go to MCContext
to get unique assembler temporary labels.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98489 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 08:36:50 +00:00
Evan Cheng
fac4f1f181 Enable machine cse pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98132 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 03:07:41 +00:00
Dale Johannesen
f7b730425f The address of an indirect call must be in R12 on Darwin.
Make it so.  (This patch is in LowerCall_Darwin, which seems
to be used by SVR4 code as well; since that doesn't belong here,
I haven't worried about this case.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98077 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 20:15:42 +00:00
Chris Lattner
f70cbb2d6a add some random nounwinds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-28 20:36:49 +00:00
Jakob Stoklund Olesen
243296690e Use the right floating point load/store instructions in PPCInstrInfo::foldMemoryOperandImpl().
The PowerPC floating point registers can represent both f32 and f64 via the
two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to
allow cross-class coalescing. This coalescing only affects whether registers
are spilled as f32 or f64.

Spill slots must be accessed with load/store instructions corresponding to the
class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking
at the instruction opcode which is wrong.

X86 has similar floating point register classes, but doesn't try to fold
memory operands, so there is no problem there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97262 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-26 21:09:24 +00:00
Chris Lattner
736a6ea3a2 Change the scheduler from adding nodes in allnodes order
to adding them in a determinstic order (bottom up from 
the root) based on the structure of the graph itself.

This updates tests for some random changes, interesting
bits: CodeGen/Blackfin/promote-logic.ll no longer crashes.
I have no idea why, but that's good right?

CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but
now compiles to have one fewer constant pool entry, making
the expected load that was being folded disappear.  Since it
is an unreduced mass of gnast, I just removed it.

This fixes PR6370


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-24 06:11:37 +00:00
Dan Gohman
278f958c61 When emitting an instruction which depends on both a post-incremented
induction variable value and a loop-variant value, don't force the
insert position to be at the post-increment position, because it may
not be dominated by the loop-variant value. This fixes a
use-before-def problem noticed on PPC.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22 03:59:54 +00:00
Chris Lattner
728ea19ece add some no-unwinds, other minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 20:33:20 +00:00
Chris Lattner
25e0f91d05 add a triple so that this doesn't fail due to linux/ppc register printing
syntax.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96748 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 19:27:38 +00:00
Chris Lattner
ad14fcc4c2 filecheckize and add nouwinds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-21 18:53:28 +00:00
Dale Johannesen
4a12de72b0 Make g5 target explicit; scheduling affects register choice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 23:25:23 +00:00
Dale Johannesen
55f9adf543 Adjust register numbers in tests to compensate for the
new lack of R2.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 22:31:31 +00:00
Dale Johannesen
c12da8d30a When save/restoring CR at prolog/epilog, in a large
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 21:35:34 +00:00
Rafael Espindola
2f82ca904a Fix alignment on ppc linux. This fixes the build of crtend.o
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95477 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-06 03:32:21 +00:00
Bill Wendling
63d58ebd09 Make test more fucused eliminating extraneous bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 11:21:05 +00:00
Bill Wendling
744f579b63 An empty global constant (one of size 0) may have a section immediately
following it. However, the EmitGlobalConstant method wasn't emitting a body for
the constant. The assembler doesn't like that. Before, we were generating this:

  .zerofill __DATA, __common, __cmd, 1, 3

This fix puts us back to that semantic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95336 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-05 00:17:02 +00:00
Dale Johannesen
9a6636b2cd Reapply 95050 with a tweak to check the register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-03 01:40:33 +00:00
Dale Johannesen
62a04136d5 Test revert 95050; there's a good chance it's causing
buildbot failure.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95103 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 18:52:56 +00:00
Dale Johannesen
5ce0ee9c09 Make local RA smarter about reusing input register of a copy
as output.  Needed for (functional) correctness in inline asm,
and should be generally beneficial.  7361612.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 02:08:02 +00:00
Chris Lattner
d49fe1b6bc Give AsmPrinter the most common expected implementation of
runOnMachineFunction, and switch PPC to use EmitFunctionBody.
The two ppc asmprinters now don't heave to define 
runOnMachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-28 01:28:58 +00:00
Daniel Dunbar
34b6ea6cef Attempt to unbreak test on Linux. Chris, please check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-25 00:54:13 +00:00
Chris Lattner
63df4a4fec stop testing for invalid output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 05:45:28 +00:00
Chris Lattner
2116a4ee55 testcase for r94095
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94096 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-21 20:01:04 +00:00
Chris Lattner
74bfe21b50 Now that we have everything nicely factored (e.g. asmprinter is not
doing global variable classification anymore) and hookized, sink almost
all target targets global variable emission code into AsmPrinter and out
of each target.

Some notes:

1. PIC16 does completely custom and crazy stuff, so it is not changed.
2. XCore has some custom handling for extra directives.  I'll look at it next.
3. This switches linux/ppc to use .globl instead of .global.  If .globl is
   actually wrong, let me know and I'll fix it.
4. This makes linux/ppc get a lot of random cases right which were obviously
   wrong before, it is probably now a bit healthier.
5. Blackfin will probably start getting .comm and other things that it didn't
   before.  If this is undesirable, it should explicitly opt out of these
   things by clearing the relevant fields of MCAsmInfo.

This leads to a nice diffstat:
 14 files changed, 127 insertions(+), 830 deletions(-)




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19 05:38:33 +00:00
Chris Lattner
2f8cc26be4 remove uses of deprecated functions, this generates slightly
different BlockAddress labels, but nothing semantically important.

Add a FIXME that BlockAddress codegen is broken if the LLVM BB has 
an empty name (e.g. strip was run).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93303 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-13 07:30:49 +00:00
Dan Gohman
aceba31b7a Delete useless trailing semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05 17:55:26 +00:00
Dale Johannesen
fc49bd2447 Do better with physical reg operands (typically, from inline asm)
in local register allocator.  If a reg-reg copy has a phys reg
input and a virt reg output, and this is the last use of the phys
reg, assign the phys reg to the virt reg.  If a reg-reg copy has
a phys reg output and we need to reload its spilled input, reload
it directly into the phys reg than passing it through another reg.

Following 76208, there is sometimes no dependency between the def of
a phys reg and its use; this creates a window where that phys reg
can be used for spilling (this is true in linear scan also).  This
is bad and needs to be fixed a better way, although 76208 works too
well in practice to be reverted.  However, there should normally be
no spilling within inline asm blocks.  The patch here goes a long way
towards making this actually be true.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-16 00:29:41 +00:00
Evan Cheng
e7c9195706 ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-25 21:13:39 +00:00
Dale Johannesen
f7801b493e Do not store R31 into the caller's link area on PPC.
This violates the ABI (that area is "reserved"), and
while it is safe if all code is generated with current
compilers, there is some very old code around that uses
that slot for something else, and breaks if it is stored
into.  Adjust testcases looking for current behavior.
I've verified that the stack frame size is right in all
testcases, whether it changed or not.  7311323.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89811 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-24 22:59:02 +00:00
Edward O'Callaghan
85d1aab444 Fix for bad FileCheck converts in revision 89584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 12:50:05 +00:00
Edward O'Callaghan
81fff07daf Convert a few tests to FileCheck for PR5307.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89584 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-22 11:45:44 +00:00
Dale Johannesen
5b8bce11d6 When generating a vector the really slow way, via loads
and stores, handle the case where the element size is not
a valid target type correctly (PPC).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-21 00:53:23 +00:00
Dale Johannesen
5ca124691b Remove an incorrect overaggressive optimization
(PPC specific).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-20 22:16:40 +00:00
Evan Cheng
39aa7251a2 Check if subreg index is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 06:31:49 +00:00
Evan Cheng
285a7d57dc For some targets, a copy can use a register multiple times, e.g. ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-16 05:52:06 +00:00
Dale Johannesen
1e608819aa Adjust isConstantSplat to allow for big-endian targets.
PPC is such a target; make it work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87060 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-13 01:45:18 +00:00
Bill Wendling
5606ec894e Fix test to work on every platform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-11 01:44:22 +00:00
Bill Wendling
6b41aba7ce Test this on Darwin only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86752 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:18:33 +00:00
Dale Johannesen
9a645cd9d4 Emit correct code when making a ConstantPool entry for a vector
constant whose component type is not a legal type for the target.
(If the target ConstantPool cannot handle this type either, it has
an opportunity to merge elements.  In practice any target with
8-bit bytes must support i8 *as data*).  7320806 (partial).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86751 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 23:16:41 +00:00
Bill Wendling
b19a5e9be6 Modify how the prologue encoded the "move" information for the FDE. GCC
generates a sequence similar to this:

__Z4funci:
LFB2:
        mflr r0
LCFI0:
        stmw r30,-8(r1)
LCFI1:
        stw r0,8(r1)
LCFI2:
        stwu r1,-80(r1)
LCFI3:
        mr r30,r1
LCFI4:

where LCFI3 and LCFI4 are used by the FDE to indicate what the FP, LR, and other
things are. We generated something more like this:

Leh_func_begin1:
        mflr r0
        stw r31, 20(r1)
        stw r0, 8(r1)
Llabel1:
        stwu r1, -80(r1)
Llabel2:
        mr r31, r1

Note that we are missing the "mr" instruction. This patch makes it more like the
GCC output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86729 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-10 22:14:04 +00:00
Dan Gohman
3f131328ff Update these tests for the new label names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 23:31:40 +00:00