Chris Lattner
27a6c7380f
Several changes:
...
1) Change the interface to TargetLowering::ExpandOperationResult to
take and return entire NODES that need a result expanded, not just
the value. This allows us to handle things like READCYCLECOUNTER,
which returns two values.
2) Implement (extremely limited) support in LegalizeDAG::ExpandOp for MERGE_VALUES.
3) Reimplement custom lowering in LegalizeDAGTypes in terms of the new
ExpandOperationResult. This makes the result simpler and fully
general.
4) Implement (fully general) expand support for MERGE_VALUES in LegalizeDAGTypes.
5) Implement ExpandOperationResult support for ARM f64->i64 bitconvert and ARM
i64 shifts, allowing them to work with LegalizeDAGTypes.
6) Implement ExpandOperationResult support for X86 READCYCLECOUNTER and FP_TO_SINT,
allowing them to work with LegalizeDAGTypes.
LegalizeDAGTypes now passes several more X86 codegen tests when enabled and when
type legalization in LegalizeDAG is ifdef'd out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44300 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-24 07:07:01 +00:00
Dale Johannesen
b97aec663b
Add parameter to getDwarfRegNum to permit targets
...
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
Bill Wendling
c69107ca11
Unifacalize the CALLSEQ{START,END} stuff.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 09:19:02 +00:00
Bill Wendling
0f8d9c04d9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
...
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
Owen Anderson
20ab29068d
Add a flag for indirect branch instructions.
...
Target maintainers: please check that the instructions for your target are correctly marked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
Anton Korobeynikov
f191c80cd7
Use TableGen to emit information for dwarf register numbers.
...
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
Evan Cheng
cc41586b9d
Much improved pic jumptable codegen:
...
Then:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
imull $4, %ecx, %ecx
leal LJTI1_0-"L1$pb"(%eax), %edx
addl LJTI1_0-"L1$pb"(%ecx,%eax), %edx
jmpl *%edx
.align 2
.set L1_0_set_3,LBB1_3-LJTI1_0
.set L1_0_set_2,LBB1_2-LJTI1_0
.set L1_0_set_5,LBB1_5-LJTI1_0
.set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
Now:
call "L1$pb"
"L1$pb":
popl %eax
...
LBB1_1: # entry
addl LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
jmpl *%eax
.align 2
.set L1_0_set_3,LBB1_3-"L1$pb"
.set L1_0_set_2,LBB1_2-"L1$pb"
.set L1_0_set_5,LBB1_5-"L1$pb"
.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
.long L1_0_set_3
.long L1_0_set_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
Lauro Ramos Venancio
e0cb36b9fb
[ARM] Implement __builtin_thread_pointer.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-08 17:20:05 +00:00
Rafael Espindola
f1ba1cad38
Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
...
Thanks for the suggestions Bill :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
Lauro Ramos Venancio
8699a97a2e
[ARM] Fix code generation for:
...
static __thread struct {
int a;
int b;
} teste = {0, 0};
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 18:33:37 +00:00
Duncan Sands
ca0ed74485
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 00:04:43 +00:00
Rafael Espindola
e0703c84dd
Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold
...
and by restructuring the X86 version.
New I just have to move this to a common place :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 14:39:58 +00:00
Rafael Espindola
fc05f402ea
Make ARM an X86 memcpy expansion more similar to each other.
...
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.
This should not change generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 11:52:06 +00:00
Dale Johannesen
ca4571e79f
Support non-POSIX hosts by removing use of strncasecmp.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43364 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-25 21:54:43 +00:00
Evan Cheng
4102eb57bb
Fix memcpy lowering when addresses are 4-byte aligned but size is not multiple of 4.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43234 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-22 22:11:27 +00:00
Rafael Espindola
7b73a5d6de
split LowerMEMCPY into LowerMEMCPYCall and LowerMEMCPYInline in the ARM backend.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43176 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 14:35:17 +00:00
Chris Lattner
3a7c33a853
Add an easy microoptimization I noticed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43164 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 03:29:26 +00:00
Evan Cheng
f0a0cddbcd
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 22:40:57 +00:00
Evan Cheng
58184e6878
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 21:29:24 +00:00
Christopher Lamb
a4c791072f
Fix a misnamed parameter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43145 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 19:29:45 +00:00
Chris Lattner
65a3323b0a
legalizing the ret operation on f64 shouldn't introduce a new
...
i64 bit convert needlessly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43116 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-18 06:17:07 +00:00
Evan Cheng
347d39f1fd
Revert 42908 for now.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 05:57:21 +00:00
Dan Gohman
8ddde0a151
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:53:36 +00:00
Dan Gohman
f96e4de403
Set ISD::FPOW to Expand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Dan Gohman
525178cdbf
Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
...
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Evan Cheng
66f0f64082
- Added a few target hooks to generate load / store instructions from / to any
...
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42621 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:32:41 +00:00
Dan Gohman
cb406c2597
Use empty() member functions when that's what's being tested for instead
...
of comparing begin() and end().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 19:26:29 +00:00
Gordon Henriksen
cd8bc05102
AsmPrinters overriding getAnalysisUsage should call super.
...
And not super's super, either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42482 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-30 13:39:29 +00:00
Evan Cheng
9efce638d3
Allow copyRegToReg to emit cross register classes copies.
...
Tested with "make check"!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:25:56 +00:00
Dan Gohman
677ccc6e8b
More explicit keywords.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 20:27:06 +00:00
Evan Cheng
76a4023096
Honor user-defined section specification of a global, ignores whether its initializer is null.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42182 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-21 00:41:19 +00:00
Evan Cheng
17207ddf38
Enable if-conversion for ARM by default.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42156 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-20 00:48:22 +00:00
Evan Cheng
e71bff7405
Avoid referencing deleted instruction.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42153 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-19 21:48:07 +00:00
Dan Gohman
92dfe2001e
Remove isReg, isImm, and isMBB, and change all their users to use
...
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 20:33:02 +00:00
Bill Wendling
fe4afb17d3
Enable indirect encoding for the personality function
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41873 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 23:55:40 +00:00
Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Duncan Sands
f7331b3dd7
Fold the adjust_trampoline intrinsic into
...
init_trampoline. There is now only one
trampoline intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
Evan Cheng
be36798bfe
80 col.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41812 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 22:22:23 +00:00
Chris Lattner
bf8ae84a21
Add some notes about better flag handling.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41808 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-10 21:43:18 +00:00
Owen Anderson
718cb665ca
Add lengthof and endof templates that hide a lot of sizeof computations.
...
Patch by Sterling Stein!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 04:06:50 +00:00
Dale Johannesen
eaf089430e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
...
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41632 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-31 04:03:46 +00:00
Raul Herbster
8c132633c8
Instruction formats added used to generate multiply instructions of V5TE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41629 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:34:14 +00:00
Raul Herbster
b94e60872e
Unused relocation type reloc_arm_absolute removed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:31:35 +00:00
Raul Herbster
9c1a3827ce
Comments added. It now generates V5TE multiply instructions. However, it is still necessary to model PUWLSH bits more clearly.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:29:26 +00:00
Raul Herbster
37fb5b154c
ARM instruction table was modified by adding information to generate multiply instruction of V5TE.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:25:47 +00:00
Raul Herbster
d05c04c169
JITInfo now resolves function addrs and also relocations. It always emits a stub.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 23:21:27 +00:00
Evan Cheng
35b35c5c32
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41597 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:52:20 +00:00
Evan Cheng
0ff94f7fcc
Initial JIT support for ARM by Raul Fernandes Herbster.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40887 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-07 01:37:15 +00:00
Dan Gohman
61e729e2e9
More explicit keywords.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40757 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 21:21:54 +00:00
Evan Cheng
7fc77611ef
Indexed loads each has 2 outputs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 00:12:08 +00:00