llvm-6502/test/CodeGen/ARM
Adrian Prantl 02474a32eb Move the complex address expression out of DIVariable and into an extra
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.

Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.

By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.

The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)

This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.

What this patch doesn't do:

This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.

http://reviews.llvm.org/D4919
rdar://problem/17994491

Thanks to dblaikie and dexonsmith for reviewing this patch!

Note: I accidentally committed a bogus older version of this patch previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-01 18:55:02 +00:00
..
Windows
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll
2007-05-07-tailmerge-1.ll
2007-05-09-tailmerge-2.ll
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll
2007-05-23-BadPreIndexedStore.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll
2008-04-10-ScavengerAssert.ll
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll
2009-08-21-PostRAKill.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-16-Scope.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2009-10-27-double-align.ll
2009-10-30.ll
2009-11-01-NeonMoves.ll
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2010-05-14-IllegalType.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll
2010-05-21-BuildVector.ll
2010-06-11-vmovdrr-bitcast.ll
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll
2010-06-25-Thumb2ITInvalidIterator.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2010-06-29-PartialRedefFastAlloc.ll
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll
2010-08-04-EHCrash.ll
2010-08-04-StackVariable.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2010-09-21-OptCmpBug.ll
2010-10-25-ifcvt-ldm.ll
2010-11-15-SpillEarlyClobber.ll
2010-11-29-PrologueBug.ll
2010-12-07-PEIBug.ll
2010-12-08-tpsoft.ll
2010-12-15-elf-lcomm.ll
2010-12-17-LocalStackSlotCrash.ll
2011-01-19-MergedGlobalDbg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2011-02-04-AntidepMultidef.ll
2011-02-07-AntidepClobber.ll
2011-03-10-DAGCombineCrash.ll
2011-03-15-LdStMultipleBug.ll
2011-03-23-PeepholeBug.ll
2011-04-07-schediv.ll
2011-04-11-MachineLICMBug.ll
2011-04-12-AlignBug.ll
2011-04-12-FastRegAlloc.ll
2011-04-15-AndVFlagPeepholeBug.ll
2011-04-15-RegisterCmpPeephole.ll
2011-04-26-SchedTweak.ll
2011-04-27-IfCvtBug.ll
2011-05-04-MultipleLandingPadSuccs.ll
2011-06-09-TailCallByVal.ll
2011-06-16-TailCallByVal.ll
2011-06-29-MergeGlobalsAlign.ll
2011-07-10-GlobalMergeBug.ll
2011-08-02-MergedGlobalDbg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
2011-08-12-vmovqqqq-pseudo.ll
2011-08-25-ldmia_ret.ll
2011-08-29-ldr_pre_imm.ll
2011-08-29-SchedCycle.ll
2011-09-09-OddVectorDivision.ll
2011-09-19-cpsr.ll
2011-09-28-CMovCombineBug.ll
2011-10-26-ExpandUnalignedLoadCrash.ll
2011-10-26-memset-inline.ll
2011-10-26-memset-with-neon.ll
2011-11-07-PromoteVectorLoadStore.ll
2011-11-09-BitcastVectorDouble.ll
2011-11-09-IllegalVectorFPIntConvert.ll
2011-11-14-EarlyClobber.ll
2011-11-28-DAGCombineBug.ll
2011-11-29-128bitArithmetics.ll
2011-11-30-MergeAlignment.ll
2011-12-14-machine-sink.ll
2011-12-19-sjlj-clobber.ll
2012-01-23-PostRA-LICM.ll
2012-01-24-RegSequenceLiveRange.ll
2012-01-26-CoalescerBug.ll
2012-01-26-CopyPropKills.ll
2012-02-01-CoalescerBug.ll
2012-03-05-FPSCR-bug.ll
2012-03-13-DAGCombineBug.ll
2012-03-26-FoldImmBug.ll
2012-04-02-TwoAddrInstrCrash.ll
2012-04-10-DAGCombine.ll
2012-04-24-SplitEHCriticalEdge.ll
2012-05-04-vmov.ll
2012-05-10-PreferVMOVtoVDUP32.ll
2012-05-29-TailDupBug.ll
2012-06-12-SchedMemLatency.ll
2012-08-04-DtripleSpillReload.ll
2012-08-08-legalize-unaligned.ll
2012-08-09-neon-extload.ll
2012-08-13-bfi.ll
2012-08-23-legalize-vmull.ll
2012-08-27-CopyPhysRegCrash.ll
2012-08-30-select.ll
2012-09-18-ARMv4ISelBug.ll
2012-09-25-InlineAsmScalarToVectorConv2.ll
2012-09-25-InlineAsmScalarToVectorConv.ll
2012-10-04-AAPCS-byval-align8.ll
2012-10-04-FixedFrame-vs-byval.ll
2012-10-04-LDRB_POST_IMM-Crash.ll
2012-10-18-PR14099-ByvalFrameAddress.ll
2012-11-14-subs_carry.ll
2013-01-21-PR14992.ll
2013-02-27-expand-vfma.ll
2013-04-05-Small-ByVal-Structs-PR15293.ll
2013-04-16-AAPCS-C4-vs-VFP.ll
2013-04-16-AAPCS-C5-vs-VFP.ll
2013-04-18-load-overlap-PR14824.ll
2013-04-21-AAPCS-VA-C.1.cp.ll
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll
2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll
2013-05-05-IfConvertBug.ll
2013-05-07-ByteLoadSameAddress.ll
2013-05-13-AAPCS-byval-padding2.ll
2013-05-13-AAPCS-byval-padding.ll
2013-05-13-DAGCombiner-undef-mask.ll
2013-05-31-char-shift-crash.ll
2013-06-03-ByVal-2Kbytes.ll
2013-07-29-vector-or-combine.ll
2013-10-11-select-stalls.ll
2013-11-08-inline-asm-neon-array.ll
2014-01-09-pseudo_expand_implicit_reg.ll
2014-02-05-vfp-regs-after-stack.ll
2014-02-21-byval-reg-split-alignment.ll
2014-05-14-DwarfEHCrash.ll
2014-07-18-earlyclobber-str-post.ll
2014-08-04-muls-it.ll
a15-mla.ll
a15-partial-update.ll
a15-SD-dep.ll
a15.ll
aapcs-hfa-code.ll [ARM] Enable DP copy, load and store instructions for FPv4-SP 2014-08-21 12:50:31 +00:00
aapcs-hfa.ll
addrmode.ll
addrspacecast.ll
adv-copy-opt.ll [ARM] Move the implementation of the target hooks related to copy-related 2014-08-22 18:05:22 +00:00
aliases.ll
align.ll
alloc-no-stack-realign.ll
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm32-round-conv.ll [AArch32] Add patterns for VCVT{A,N,P,M}. 2014-08-25 16:56:33 +00:00
arm32-rounding.ll [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
arm-abi-attr.ll
arm-and-tst-peephole.ll
arm-asm.ll
arm-frameaddr.ll
arm-modifier.ll
arm-negative-stride.ll
arm-returnaddr.ll
arm-ttype-target2.ll
armv4.ll
atomic-64bit.ll
atomic-cmp.ll
atomic-cmpxchg.ll Lower thumbv4t & thumbv5 lo->lo copies through a push-pop sequence 2014-08-20 23:38:50 +00:00
atomic-load-store.ll Restore "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors" 2014-09-18 18:56:04 +00:00
atomic-op.ll Add a thread-model knob for lowering atomics on baremetal & single threaded systems 2014-08-21 14:35:47 +00:00
atomic-ops-v8.ll
atomicrmw_minmax.ll
available_externally.ll
avoid-cpsr-rmw.ll
bfc.ll
bfi.ll
bfx.ll
bic.ll
bicZext.ll
big-endian-eh-unwind.ll
big-endian-neon-bitconv.ll
big-endian-neon-extend.ll
big-endian-neon-trunc-store.ll
big-endian-ret-f64.ll
big-endian-vector-callee.ll
big-endian-vector-caller.ll
bits.ll
bswap16.ll
bswap-inline-asm.ll
build-attributes-encoding.s
build-attributes.ll [ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM) 2014-10-01 09:02:17 +00:00
bx_fold.ll
byval_load_align.ll
cache-intrinsic.ll
call_nolink.ll
call-noret-minsize.ll
call-noret.ll
call-tc.ll
call.ll
carry.ll Only emit movw on ARMv6T2+ 2014-09-02 22:45:13 +00:00
clz.ll
cmn.ll
cmpxchg-idioms.ll
cmpxchg-weak.ll
coalesce-dbgvalue.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
coalesce-subregs.ll
code-placement.ll
commute-movcc.ll
compare-call.ll
constantfp.ll
constants.ll
copy-paired-reg.ll
crash-greedy-v6.ll
crash-greedy.ll
crash-O0.ll
crash-shufflevector.ll
crash.ll
cse-call.ll
cse-ldrlit.ll
cse-libcalls.ll
ctor_order.ll
ctors_dtors.ll
ctz.ll
dagcombine-anyexttozeroext.ll
dagcombine-concatvector.ll
darwin-eabi.ll [ARM] Enable DP copy, load and store instructions for FPv4-SP 2014-08-21 12:50:31 +00:00
darwin-section-order.ll
data-in-code-annotations.ll
dbg.ll ARM: Add patterns for dbg 2014-08-26 12:47:26 +00:00
DbgValueOtherTargets.test
debug-frame-large-stack.ll
debug-frame-no-debug.ll
debug-frame-vararg.ll
debug-frame.ll
debug-info-arg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-blocks.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-branch-folding.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-d16-reg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-qreg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-s16-reg.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-info-sreg2.ll Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
debug-segmented-stacks.ll
default-float-abi.ll
deps-fix.ll
div.ll
divmod-eabi.ll Revert "ARM: improve RTABI 4.2 conformance on Linux" 2014-08-23 18:29:43 +00:00
divmod.ll
domain-conv-vmovs.ll
dwarf-eh.ll
dyn-stackalloc.ll
eh-dispcont.ll
eh-resume-darwin.ll
ehabi-filters.ll
ehabi-handlerdata-nounwind.ll
ehabi-handlerdata.ll
ehabi-no-landingpad.ll
ehabi-unwind.ll
ehabi.ll
elf-lcomm-align.ll
emit-big-cst.ll
extload-knownzero.ll
extloadi1.ll
fabs-neon.ll
fabss.ll
fadds.ll
fast-isel-align.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-br-phi.ll
fast-isel-call-multi-reg-return.ll
fast-isel-call.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel-cmp-imm.ll
fast-isel-conversion.ll
fast-isel-crash2.ll
fast-isel-crash.ll
fast-isel-deadcode.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel-ext.ll
fast-isel-fold.ll
fast-isel-frameaddr.ll
fast-isel-GEP-coalesce.ll
fast-isel-icmp.ll
fast-isel-indirectbr.ll
fast-isel-inline-asm.ll
fast-isel-intrinsic.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel-ldr-str-arm.ll
fast-isel-ldr-str-thumb-neg-index.ll
fast-isel-ldrh-strh-arm.ll
fast-isel-load-store-verify.ll
fast-isel-mvn.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel-pic.ll
fast-isel-pred.ll
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-select.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel-shifter.ll
fast-isel-static.ll
fast-isel-vararg.ll Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588). 2014-08-19 19:05:24 +00:00
fast-isel.ll
fast-tail-call.ll
fastcc-vfp.ll
fastisel-gep-promote-before-add.ll
fastisel-thumb-litpool.ll
fcopysign.ll
fdivs.ll
fixunsdfdi.ll
flag-crash.ll
floorf.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnegs.ll optimize vector fneg of bitcasted integer value 2014-08-14 15:15:28 +00:00
fnmacs.ll
fnmscs.ll
fnmul.ll
fnmuls.ll
fold-const.ll
fold-stack-adjust.ll ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
formal.ll
fp16.ll ARM: __gnu_h2f_ieee and __gnu_f2h_ieee always use the soft-float calling convention 2014-08-11 09:12:32 +00:00
fp_convert.ll
fp-arg-shuffle.ll
fp-fast.ll
fp.ll
fparith.ll
fpcmp_ueq.ll
fpcmp-opt.ll
fpcmp.ll
fpconsts.ll
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll
fptoint.ll
frame-register.ll
fsubs.ll
func-argpassing-endian.ll
fusedMAC.ll
global-merge-1.ll
global-merge-addrspace.ll
global-merge.ll
globals.ll
gpr-paired-spill-thumbinst.ll
gpr-paired-spill.ll
gv-stubs-crash.ll
half.ll
hardfloat_neon.ll
hello.ll
hfa-in-contiguous-registers.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
hints.ll
iabs.ll
ifconv-kills.ll
ifconv-regmask.ll
ifcvt1.ll
ifcvt2.ll
ifcvt3.ll
ifcvt4.ll
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll
ifcvt11.ll
ifcvt12.ll
ifcvt-branch-weight-bug.ll
ifcvt-branch-weight.ll
illegal-vector-bitcast.ll
imm.ll
indirect-hidden.ll
indirect-reg-input.ll
indirectbr-2.ll
indirectbr-3.ll
indirectbr.ll
inline-diagnostics.ll
inlineasm2.ll
inlineasm3.ll
inlineasm4.ll
inlineasm-64bit.ll
inlineasm-global.ll
inlineasm-imm-arm.ll
inlineasm-ldr-pseudo.ll
inlineasm-switch-mode-oneway-from-arm.ll
inlineasm-switch-mode-oneway-from-thumb.ll
inlineasm-switch-mode.ll
inlineasm.ll
insn-sched1.ll
int-to-fp.ll
integer_insertelement.ll
interrupt-attr.ll
intrinsics-crypto.ll
intrinsics-memory-barrier.ll
intrinsics-overflow.ll
intrinsics-v8.ll
intrinsics.ll
invoke-donothing-assert.ll
ispositive.ll
jump_tables.ll
jumptable-label.ll
large-stack.ll
ldaex-stlex.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd-memoper.ll
ldrd.ll
ldst-f32-2-i32.ll
ldstrex-m.ll
ldstrex.ll
lit.local.cfg
load_i1_select.ll
load-address-masked.ll
load-global.ll
load.ll
log2_not_readnone.ll
long_shift.ll
long-setcc.ll
long.ll
longMAC.ll
lsr-code-insertion.ll
lsr-icmp-imm.ll
lsr-scale-addr-mode.ll
lsr-unfolded-offset.ll
machine-cse-cmp.ll
machine-licm.ll
mature-mc-support.ll
mem.ll
memcpy-inline.ll
memfunc.ll
memset-inline.ll
MergeConsecutiveStores.ll
metadata-default.ll
metadata-short-enums.ll
metadata-short-wchar.ll
minsize-imms.ll
minsize-litpools.ll
misched-copy-arm.ll
mls.ll
movt-movw-global.ll
movt.ll
mul_const.ll
mul.ll
mulhi.ll
mult-alt-generic-arm.ll
mvn.ll
named-reg-alloc.ll
named-reg-notareg.ll
negative-offset.ll ARM: Negative offset support problem 2014-09-09 09:57:59 +00:00
neon_arith1.ll
neon_cmp.ll
neon_div.ll
neon_fpconv.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
neon_shift.ll
neon_spill.ll
neon_vabs.ll
neon-fma.ll
neon-spfp.ll
no-fpu.ll
no-tail-call.ll [ARM] Do not perform a tail call when the caller returns several values. 2014-09-18 21:17:50 +00:00
none-macho-v4t.ll
none-macho.ll
nop_concat_vectors.ll
noreturn.ll
null-streamer.ll
odr_comdat.ll
opt-shuff-tstore.ll
optimize-dmbs-v7.ll
optselect-regclass.ll
out-of-registers.ll
pack.ll
peephole-bitcast.ll
phi.ll
pic.ll
popcnt.ll
pr3502.ll
pr13249.ll
pr18364-movw.ll Missing test from r216989 2014-09-02 22:46:18 +00:00
PR15053.ll
prefetch.ll
private.ll
rbit.ll ARM: Fix codegen for rbit intrinsic 2014-08-20 10:40:20 +00:00
readcyclecounter.ll
reg_sequence.ll
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_sret_vector.ll
ret_void.ll
returned-ext.ll
returned-trunc-tail-calls.ll
rev.ll
saxpy10-a9.ll
sbfx.ll
section-name.ll
section.ll
segmented-stacks-dynamic.ll
segmented-stacks.ll
select_xform.ll
select-imm.ll
select-undef.ll
select.ll
setcc-sentinals.ll
shifter_operand.ll
shuffle.ll
sincos.ll
sjlj-prepare-critical-edge.ll
sjljehprepare-lower-empty-struct.ll
smml.ll
smul.ll
spill-q.ll
ssp-data-layout.ll
stack_guard_remat.ll
stack-frame.ll
stack-protector-bmovpcb_call.ll
stackpointer.ll
stm.ll
str_post.ll
str_pre-2.ll
str_pre.ll
str_trunc.ll
struct_byval_arm_t1_t2.ll
struct_byval.ll
struct-byval-frame-index.ll
sub-cmp-peephole.ll
sub.ll
subreg-remat.ll
swift-atomics.ll Fix swift-atomics testcase 2014-09-23 23:18:01 +00:00
swift-vldm.ll
sxt_rot.ll
t2-imm.ll
tail-call.ll [ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage 2014-08-18 12:42:15 +00:00
tail-dup.ll
tail-merge-branch-weight.ll
tail-opts.ll
taildup-branch-weight.ll
test-sharedidx.ll
this-return.ll
thread_pointer.ll
thumb1_return_sequence.ll ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
thumb1-varalloc.ll
thumb2-it-block.ll ARM: try harder to detect non-IT eligible instructions 2014-08-11 20:13:25 +00:00
thumb2-size-opt.ll [ARM] Add Thumb-2 code size optimization regression test for LSR (register). 2014-09-11 10:45:50 +00:00
thumb-litpool.ll
tls1.ll
tls2.ll
tls3.ll
tls-models.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll
tst_teq.ll
twoaddrinstr.ll
uint64tof64.ll
umulo-32.ll
unaligned_load_store_vector.ll
unaligned_load_store.ll
undef-sext.ll
undefined.ll
unord.ll
unsafe-fsub.ll
unwind-init.ll
uxt_rot.ll
uxtb.ll
v1-constant-fold.ll
va_arg.ll
vaba.ll
vabd.ll
vabs.ll
vadd.ll
vararg_no_start.ll ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
varargs-spill-stack-align-nacl.ll
vargs_align.ll ARM / x86_64 varargs: Don't save regparms in prologue without va_start 2014-08-22 21:59:26 +00:00
vargs.ll
vbits.ll
vbsl-constant.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
vcnt.ll
vcombine.ll
vcvt_combine.ll
vcvt-cost.ll
vcvt-v8.ll
vcvt.ll
vdiv_combine.ll
vdup.ll
vector-DAGCombine.ll
vector-extend-narrow.ll
vector-spilling.ll
vext.ll
vfcmp.ll
vfloatintrinsics.ll
vfp-libcalls.ll
vfp-regs-dwarf.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vlddup.ll
vldlane.ll
vldm-liveness.ll
vldm-sched-a9.ll
vminmax.ll
vminmaxnm.ll
vmla.ll
vmls.ll
vmov.ll
vmul.ll
vneg.ll
vpadal.ll
vpadd.ll
vpminmax.ll
vqadd.ll
vqdmul.ll
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll
vsel.ll
vselect_imax.ll
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll
vsub.ll
vtbl.ll
vtrn.ll
vuzp.ll
vzip.ll
warn-stack.ll
weak2.ll
weak.ll
widen-vmovs.ll
wrong-t2stmia-size-opt.ll ARM: don't size-reduce STMs using the LR register. 2014-09-10 12:53:28 +00:00
zero-cycle-zero.ll
zextload_demandedbits.ll