Ulrich Weigand 457571ed69 [PowerPC] Add some special @got@tprel fixup cases ... When a target@got@tprel or target@got@tprel@l symbol variant is used in a fixup_ppc_half16 (*not* fixup_ppc_half16ds) context, we currently fail, since the corresponding R_PPC64_GOT_TPREL16 / R_PPC64_GOT_TPREL16_LO relocation types do not exist. However, since such symbol variants resolve to GOT offsets which are always 4-aligned, we can simply instead use the _DS variants of the relocation types, which *do* exist. The same applies for the @got@dtprel variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185700 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-05 13:49:46 +00:00
..
lit.local.cfg
ppc64-encoding-bookII.s	[PowerPC] Also add "msync" alias	2013-07-01 20:39:50 +00:00
ppc64-encoding-ext.s	[PowerPC] Add all trap mnemonics	2013-07-04 14:40:12 +00:00
ppc64-encoding-fp.s
ppc64-encoding-vmx.s
ppc64-encoding.s	[PowerPC] Add all trap mnemonics	2013-07-04 14:40:12 +00:00
ppc64-errors.s	[PowerPC] Support @tls in the asm parser	2013-07-05 12:22:36 +00:00
ppc64-fixup-apply.s	[PowerPC] Support @higher et.al. modifiers	2013-06-21 14:43:42 +00:00
ppc64-fixup-explicit.s	[PowerPC] Fix @got references to local symbols	2013-07-01 18:19:56 +00:00
ppc64-fixups.s	[PowerPC] Add some special @got@tprel fixup cases	2013-07-05 13:49:46 +00:00
ppc64-initial-cfa.s	[MC/DWARF] Support .debug_frame / .debug_line code alignment factors	2013-06-12 14:46:54 +00:00
ppc64-operands.s	[PowerPC] Accept 17-bit signed immediates for addis	2013-06-26 13:49:53 +00:00
ppc64-regs.s	Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling	2013-07-02 03:39:34 +00:00
ppc64-relocs-01.s	[PowerPC] Use assembler source in MC tests	2013-06-12 14:14:18 +00:00
ppc64-tls-relocs-01.s	[PowerPC] Use assembler source in MC tests	2013-06-12 14:14:18 +00:00
ppc-nop.s	[PowerPC] Implement writeNopData	2013-07-04 18:28:46 +00:00