llvm-6502/test/CodeGen
Ahmed Bougacha 0f1a21bcb8 [AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract.
This avoids a partial false dependency on the previous content of
the upper lanes of the destination vector register.

Differential Revision: http://reviews.llvm.org/D7307


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227820 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-02 17:55:57 +00:00
..
AArch64 [AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract. 2015-02-02 17:55:57 +00:00
ARM Fix ARM peephole optimizeCompare to avoid optimizing unsigned cmp to 0. 2015-02-02 16:56:50 +00:00
BPF
CPP
Generic
Hexagon [Hexagon] Deleting old variants of intrinsics and adding missing tests. 2015-01-29 17:26:56 +00:00
Inputs
Mips
MSP430
NVPTX [NVPTX] Emit .pragma "nounroll" for loops marked with nounroll 2015-02-01 02:27:45 +00:00
PowerPC [PowerPC] VSX stores don't also read 2015-02-01 19:07:41 +00:00
R600 R600/SI: Only select cvt_flr/cvt_rpi with no NaNs. 2015-01-31 21:28:13 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 fix typo 2015-02-02 17:47:30 +00:00
XCore