llvm-6502/test/CodeGen
Tom Stellard 1f143aa3e9 R600/SI: Lower i64 SELECT by bitcasting to a vector type
This allows allows us to replace ISD::EXTRACT_ELEMENT, which is lowered
using shifts, with ISD::EXTRACT_VECTOR_ELT, which is a no-op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 14:01:55 +00:00
..
AArch64 [AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS 2014-03-27 16:28:09 +00:00
ARM ARM: add intrinsics for the v8 ldaex/stlex 2014-03-26 14:39:31 +00:00
ARM64 [ARM64] Fix materialization of an fp128 zero immediate. There currently 2014-03-31 00:02:10 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips Fixed issue with microMIPS JAL instruction. 2014-03-31 14:00:10 +00:00
MSP430 Fix known typos 2014-01-24 17:20:08 +00:00
NVPTX Add test to test/CodeGen/NVPTX for "alloca buffer" arguments. 2014-03-24 16:52:30 +00:00
PowerPC Look at shuffles of build_vectors in DAGCombiner::visitEXTRACT_VECTOR_ELT 2014-03-31 11:43:19 +00:00
R600 R600/SI: Lower i64 SELECT by bitcasting to a vector type 2014-03-31 14:01:55 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
Thumb Add triples to try to fix the windows bots. 2014-02-13 16:49:47 +00:00
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 [x86] Fix printing of register operands with q modifier. 2014-03-28 23:28:07 +00:00
XCore [XCore] Add support for the "m" inline asm constraint. 2014-03-06 16:37:48 +00:00