llvm-6502/test/CodeGen/CellSPU
Kalle Raiskila 505faa6b12 Change v64 datalayout in SPU.
The SPU ABI does not mention v64, and all examples
in C suggest v128 are treated similarily to arrays, 
we use array alignment for v64 too. This makes the 
alignment of e.g. [2 x <2 x i32>] behave "intuitively"
and similar to as if the elements were e.g. i32s.

This also makes an "unaligned store" test to be 
aligned, with different (but functionally equivalent)
code generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117360 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 10:45:47 +00:00
..
useful-harnesses
2009-01-01-BrCond.ll
2010-04-07-DbgValueOtherTargets.ll
and_ops.ll
arg_ret.ll Zap some redundant 'ori $?, $?, 0' from SPU. 2010-10-01 09:20:01 +00:00
bigstack.ll Have SPU handle halfvec stores aligned by 8 bytes. 2010-08-09 16:33:00 +00:00
bss.ll
call_indirect.ll
call.ll Fix SPU BE to use all the available return registers. 2010-08-24 11:50:48 +00:00
crash.ll
ctpop.ll
dg.exp
dp_farith.ll
eqv.ll
extract_elt.ll
fcmp32.ll
fcmp64.ll
fdiv.ll
fneg-fabs.ll
i8ops.ll
i64ops.ll
icmp8.ll
icmp16.ll
icmp32.ll
icmp64.ll
immed16.ll
immed32.ll
immed64.ll
int2fp.ll
intrinsics_branch.ll
intrinsics_float.ll
intrinsics_logical.ll
jumptable.ll
loads.ll
mul_ops.ll
mul-with-overflow.ll
nand.ll
or_ops.ll
private.ll
rotate_ops.ll
select_bits.ll
sext128.ll Improve lowering of sext to i128 on SPU. 2010-10-18 09:34:19 +00:00
shift_ops.ll
shuffles.ll Fix CellSPU vector shuffles, again. 2010-09-08 11:53:38 +00:00
sp_farith.ll
stores.ll
storestruct.ll
struct_1.ll
sub_ops.ll
trunc.ll
v2f32.ll Change v64 datalayout in SPU. 2010-10-26 10:45:47 +00:00
v2i32.ll Change v64 datalayout in SPU. 2010-10-26 10:45:47 +00:00
vec_const.ll
vecinsert.ll