llvm-6502/lib/Target/CellSPU
2011-01-31 21:38:14 +00:00
..
TargetInfo
CellSDKIntrinsics.td
CMakeLists.txt Add a "nop filler" pass to SPU. 2011-01-11 09:07:54 +00:00
Makefile
README.txt Allow sign-extending of i8 and i16 to i128 on SPU. 2011-01-20 15:49:06 +00:00
SPU64InstrInfo.td
SPU128InstrInfo.td
SPU.h Add a "nop filler" pass to SPU. 2011-01-11 09:07:54 +00:00
SPU.td
SPUAsmPrinter.cpp
SPUCallingConv.td
SPUFrameLowering.cpp Teach frame lowering to ignore debug values after the terminators. 2011-01-13 21:28:52 +00:00
SPUFrameLowering.h Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
SPUHazardRecognizers.cpp Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
SPUHazardRecognizers.h Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
SPUInstrBuilder.h
SPUInstrFormats.td
SPUInstrInfo.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
SPUInstrInfo.h Various bits of framework needed for precise machine-level selection 2010-12-24 05:03:26 +00:00
SPUInstrInfo.td Fix vector sign extend to put the source and destination types in the 2011-01-31 20:39:01 +00:00
SPUISelDAGToDAG.cpp Null initialize a few variables flagged by 2011-01-23 17:05:06 +00:00
SPUISelLowering.cpp Keep track of incoming argument's location while emitting LiveIns. 2011-01-31 21:38:14 +00:00
SPUISelLowering.h
SPUMachineFunction.h
SPUMathInstr.td
SPUMCAsmInfo.cpp
SPUMCAsmInfo.h
SPUNodes.td Flag -> Glue, the ongoing saga 2010-12-23 18:28:41 +00:00
SPUNopFiller.cpp Fix a thinko in 123226 that caused test failures on "other" platforms. 2011-01-11 11:27:56 +00:00
SPUOperands.td Don't feed 19 bit immediates to ILA. 2010-12-17 09:36:09 +00:00
SPURegisterInfo.cpp Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 2011-01-10 12:39:04 +00:00
SPURegisterInfo.h
SPURegisterInfo.td
SPURegisterNames.h
SPUSchedule.td Split up RotateShift itinerary in SPU. 2011-01-17 13:33:19 +00:00
SPUSelectionDAGInfo.cpp
SPUSelectionDAGInfo.h
SPUSubtarget.cpp
SPUSubtarget.h
SPUTargetMachine.cpp Add a "nop filler" pass to SPU. 2011-01-11 09:07:54 +00:00
SPUTargetMachine.h Add a "nop filler" pass to SPU. 2011-01-11 09:07:54 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

Some minor fixes added by Kalle Raiskila.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: done
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===