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9994b911f4
This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242727 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
Disassembler | ||
MCTargetDesc | ||
TargetInfo | ||
BitTracker.cpp | ||
BitTracker.h | ||
CMakeLists.txt | ||
Hexagon.h | ||
Hexagon.td | ||
HexagonAsmPrinter.cpp | ||
HexagonAsmPrinter.h | ||
HexagonBitTracker.cpp | ||
HexagonBitTracker.h | ||
HexagonCallingConv.td | ||
HexagonCFGOptimizer.cpp | ||
HexagonCommonGEP.cpp | ||
HexagonCopyToCombine.cpp | ||
HexagonExpandCondsets.cpp | ||
HexagonExpandPredSpillCode.cpp | ||
HexagonFixupHwLoops.cpp | ||
HexagonFrameLowering.cpp | ||
HexagonFrameLowering.h | ||
HexagonGenExtract.cpp | ||
HexagonGenInsert.cpp | ||
HexagonGenMux.cpp | ||
HexagonGenPredicate.cpp | ||
HexagonHardwareLoops.cpp | ||
HexagonInstrFormats.td | ||
HexagonInstrFormatsV4.td | ||
HexagonInstrInfo.cpp | ||
HexagonInstrInfo.h | ||
HexagonInstrInfo.td | ||
HexagonInstrInfoV3.td | ||
HexagonInstrInfoV4.td | ||
HexagonInstrInfoV5.td | ||
HexagonInstrInfoVector.td | ||
HexagonIntrinsics.td | ||
HexagonIntrinsicsDerived.td | ||
HexagonIntrinsicsV3.td | ||
HexagonIntrinsicsV4.td | ||
HexagonIntrinsicsV5.td | ||
HexagonISelDAGToDAG.cpp | ||
HexagonISelLowering.cpp | ||
HexagonISelLowering.h | ||
HexagonIsetDx.td | ||
HexagonMachineFunctionInfo.cpp | ||
HexagonMachineFunctionInfo.h | ||
HexagonMachineScheduler.cpp | ||
HexagonMachineScheduler.h | ||
HexagonMCInstLower.cpp | ||
HexagonNewValueJump.cpp | ||
HexagonOperands.td | ||
HexagonPeephole.cpp | ||
HexagonRegisterInfo.cpp | ||
HexagonRegisterInfo.h | ||
HexagonRegisterInfo.td | ||
HexagonRemoveSZExtArgs.cpp | ||
HexagonSchedule.td | ||
HexagonScheduleV4.td | ||
HexagonSelectCCInfo.td | ||
HexagonSelectionDAGInfo.cpp | ||
HexagonSelectionDAGInfo.h | ||
HexagonSplitConst32AndConst64.cpp | ||
HexagonSubtarget.cpp | ||
HexagonSubtarget.h | ||
HexagonTargetMachine.cpp | ||
HexagonTargetMachine.h | ||
HexagonTargetObjectFile.cpp | ||
HexagonTargetObjectFile.h | ||
HexagonTargetStreamer.h | ||
HexagonVLIWPacketizer.cpp | ||
LLVMBuild.txt | ||
Makefile |