Chris Lattner 27287664c2 force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116170 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-10 18:59:01 +00:00
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Alpha	PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually	2010-08-01 21:13:28 +00:00
ARM	Correct some load / store instruction itinerary mistakes:	2010-10-09 01:03:04 +00:00
Blackfin	Remove TargetInstrInfo::copyRegToReg entirely.	2010-07-11 17:01:17 +00:00
CBackend
CellSPU	Zap some redundant 'ori $?, $?, 0' from SPU.	2010-10-01 09:20:01 +00:00
CPP
Generic	Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself	2010-07-27 18:02:18 +00:00
MBlaze
Mips	Enable machine sinking critical edge splitting. e.g.	2010-09-20 22:52:00 +00:00
MSP430	CombinerAA is now reordering these stores.	2010-09-20 20:56:29 +00:00
PIC16
PowerPC	force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me.	2010-10-10 18:59:01 +00:00
PTX	Add test case for PTX ret instruction	2010-09-25 07:49:54 +00:00
SPARC
SystemZ	Correct bogus module triple specifications.	2010-08-30 10:48:29 +00:00
Thumb	Try again to disable critical edge splitting in CodeGenPrepare.	2010-09-30 20:51:52 +00:00
Thumb2	Change register allocation order for ARM VFP and NEON registers to put the	2010-10-08 06:15:13 +00:00
X86	Recommit 116056, now with the missing file...	2010-10-08 19:24:18 +00:00
XCore	Enable machine sinking critical edge splitting. e.g.	2010-09-20 22:52:00 +00:00
thumb2-mul.ll	Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes	2010-09-21 22:51:46 +00:00