..
InstPrinter
R600: Bank Swizzle now display SCL equivalent
2013-06-29 19:32:29 +00:00
MCTargetDesc
Remove address spaces from MC.
2013-07-02 15:49:13 +00:00
TargetInfo
AMDGPU.h
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
2013-07-27 00:01:07 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp
R600/SI: Initial local memory support
2013-07-10 16:37:07 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp
AMDGPUInstrInfo.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.h
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td
R600: Add support for 24-bit MUL instructions
2013-07-23 01:48:42 +00:00
AMDGPUIntrinsics.td
R600: Add support for GROUP_BARRIER instruction
2013-06-28 15:46:59 +00:00
AMDGPUISelDAGToDAG.cpp
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
AMDGPUISelLowering.cpp
R600: Implement TargetLowering::getVectorIdxTy()
2013-08-05 22:22:07 +00:00
AMDGPUISelLowering.h
R600: Implement TargetLowering::getVectorIdxTy()
2013-08-05 22:22:07 +00:00
AMDGPUMachineFunction.cpp
Move string pointer from being a static class member to just a static global in the one file its needed in.
2013-07-17 00:31:35 +00:00
AMDGPUMachineFunction.h
Move string pointer from being a static class member to just a static global in the one file its needed in.
2013-07-17 00:31:35 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
2013-07-27 00:01:07 +00:00
AMDGPUTargetMachine.h
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
2013-07-27 00:01:07 +00:00
AMDGPUTargetTransformInfo.cpp
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
2013-07-27 00:01:07 +00:00
AMDILBase.td
AMDILCFGStructurizer.cpp
R600: Remove predicated_break inst
2013-07-31 19:31:14 +00:00
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelLowering.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
AMDILRegisterInfo.td
CMakeLists.txt
SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
2013-07-27 00:01:07 +00:00
LLVMBuild.txt
Makefile
Processors.td
Add a newline.
2013-07-01 21:31:10 +00:00
R600ControlFlowFinalizer.cpp
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
R600Defines.h
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600EmitClauseMarkers.cpp
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
2013-07-14 04:42:23 +00:00
R600ExpandSpecialInstrs.cpp
R600: Remove predicated_break inst
2013-07-31 19:31:14 +00:00
R600InstrFormats.td
Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"
2013-07-31 20:43:03 +00:00
R600InstrInfo.cpp
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
R600InstrInfo.h
Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"
2013-07-31 20:43:03 +00:00
R600Instructions.td
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
R600ISelLowering.h
R600: Use DAG lowering pass to handle fcos/fsin
2013-07-09 15:03:11 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
Revert "R600: Non vector only instruction can be scheduled on trans unit"
2013-07-31 20:43:27 +00:00
R600MachineScheduler.h
Revert "R600: Non vector only instruction can be scheduled on trans unit"
2013-07-31 20:43:27 +00:00
R600OptimizeVectorRegisters.cpp
R600: Do not mergevector after a vector reg is used
2013-07-31 19:32:12 +00:00
R600Packetizer.cpp
Revert "R600: Non vector only instruction can be scheduled on trans unit"
2013-07-31 20:43:27 +00:00
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600: Add 64-bit float load/store support
2013-08-01 15:23:42 +00:00
R600Schedule.td
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600TextureIntrinsicsReplacer.cpp
SIAnnotateControlFlow.cpp
Add 'const' qualifiers to static const char* variables.
2013-07-16 01:17:10 +00:00
SIDefines.h
R600/SI: Initial local memory support
2013-07-10 16:37:07 +00:00
SIInsertWaits.cpp
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIInstrFormats.td
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIInstrInfo.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
SIInstrInfo.h
SIInstrInfo.td
R600: Remove unsafe type punning. No intended functionality change.
2013-07-12 20:18:05 +00:00
SIInstructions.td
R600: Implement TargetLowering::getVectorIdxTy()
2013-08-05 22:22:07 +00:00
SIIntrinsics.td
R600/SI: Add intrinsic for retrieving the current thread ID
2013-07-10 16:36:52 +00:00
SIISelLowering.cpp
R600/SI: Custom lower i64 ZERO_EXTEND
2013-08-01 15:23:26 +00:00
SIISelLowering.h
R600/SI: Custom lower i64 ZERO_EXTEND
2013-08-01 15:23:26 +00:00
SILowerControlFlow.cpp
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
R600/SI: Add support for v2f32 loads
2013-07-18 21:43:48 +00:00
SISchedule.td
