llvm-6502/test/CodeGen
Arnold Schwaighofer 2e750c12e9 ARM NEON: Merge a f32 bitcast of a v2i32 extractelt
A vectorized sitfp on doubles will get scalarized to a sequence of an
extract_element of <2 x i32>, a bitcast to f32 and a sitofp.
Due to the the extract_element, and the bitcast we will uneccessarily generate
moves between scalar and vector registers.

The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract
the element from the vector instead.

radar://13191881

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175520 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-19 15:27:05 +00:00
..
AArch64 AArch64: remove ConstantIsland pass & put literals in separate section. 2013-02-15 09:33:43 +00:00
ARM ARM NEON: Merge a f32 bitcast of a v2i32 extractelt 2013-02-19 15:27:05 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: add support for predicate-GPR copies. 2013-02-13 22:56:34 +00:00
MBlaze
Mips Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16, 2013-02-19 03:56:57 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC DAGCombiner: Constant folding around pre-increment loads/stores 2013-02-08 21:35:47 +00:00
R600 R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern 2013-02-18 14:11:28 +00:00
SI
SPARC
Thumb
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 Support for HiPE-compatible code emission, patch by Yiannis Tsiouris. 2013-02-18 20:55:12 +00:00
XCore