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llvm-6502/test/CodeGen/CellSPU
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Jakob Stoklund Olesen fe9dd87783 Remove histogram tests. 
Counting the number of occurences of each opcode is not a useful test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144474 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-12 22:39:40 +00:00
..
useful-harnesses
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2009-01-01-BrCond.ll
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2010-04-07-DbgValueOtherTargets.ll
If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
2010-12-06 22:39:26 +00:00
and_ops.ll
Reapply r143206, with fixes. Disallow physical register lifetimes
2011-11-03 21:49:52 +00:00
arg_ret.ll
Fix memory access lowering on SPU, adding
2010-11-12 10:14:03 +00:00
bigstack.ll
Have SPU handle halfvec stores aligned by 8 bytes.
2010-08-09 16:33:00 +00:00
bss.ll
Be nice to Xcore and the XMOS assembler and avoid quoting section names
2011-03-04 20:03:14 +00:00
call.ll
Remove histogram tests.
2011-11-12 22:39:40 +00:00
crash.ll
teach cellspu how to return i8 and i16 from calls,
2010-04-20 05:36:09 +00:00
ctpop.ll
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dg.exp
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div_ops.ll
Division by pow-of-2 is not cheap on SPU, do it with
2010-11-23 13:27:59 +00:00
dp_farith.ll
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eqv.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
extract_elt.ll
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fcmp32.ll
Allow for 'fcmp ogt' in SPU.
2010-11-24 11:42:17 +00:00
fcmp64.ll
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fdiv.ll
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fneg-fabs.ll
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i8ops.ll
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i64ops.ll
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icmp8.ll
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icmp16.ll
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icmp32.ll
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icmp64.ll
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immed16.ll
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immed32.ll
Don't feed 19 bit immediates to ILA.
2010-12-17 09:36:09 +00:00
immed64.ll
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int2fp.ll
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intrinsics_branch.ll
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intrinsics_float.ll
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intrinsics_logical.ll
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jumptable.ll
Mark 'branch indirect' instruction as an indirect branch.
2011-10-13 11:40:03 +00:00
loads.ll
Allow load from constant on SPU.
2011-03-04 12:00:11 +00:00
mul_ops.ll
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mul-with-overflow.ll
manually upgrade a bunch of tests to modern syntax, and remove some that
2011-06-17 03:14:27 +00:00
nand.ll
Reapply r143206, with fixes. Disallow physical register lifetimes
2011-11-03 21:49:52 +00:00
or_ops.ll
Reapply r143206, with fixes. Disallow physical register lifetimes
2011-11-03 21:49:52 +00:00
private.ll
make the asmparser reject function and type redefinitions. 'Merging' hasn't been
2011-06-17 07:06:44 +00:00
rotate_ops.ll
Fix mistyped CHECK lines.
2011-03-09 22:07:31 +00:00
select_bits.ll
Reapply r143206, with fixes. Disallow physical register lifetimes
2011-11-03 21:49:52 +00:00
sext128.ll
Allow sign-extending of i8 and i16 to i128 on SPU.
2011-01-20 15:49:06 +00:00
shift_ops.ll
Enable element promotion type legalization by deafault.
2011-10-16 20:31:33 +00:00
shuffles.ll
Enable element promotion type legalization by deafault.
2011-10-16 20:31:33 +00:00
sp_farith.ll
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stores.ll
Allow load from constant on SPU.
2011-03-04 12:00:11 +00:00
storestruct.ll
"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
2010-05-04 17:58:46 +00:00
struct_1.ll
Reapply r143206, with fixes. Disallow physical register lifetimes
2011-11-03 21:49:52 +00:00
sub_ops.ll
Fix encoding of 'sf' and 'sfh' instructions.
2010-05-10 08:13:49 +00:00
trunc.ll
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v2f32.ll
don't test for codegen of 'store undef'
2011-04-09 02:31:26 +00:00
v2i32.ll
Enable element promotion type legalization by deafault.
2011-10-16 20:31:33 +00:00
vec_const.ll
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vecinsert.ll
Fix SPU to cope with vector insertelement to an undef position.
2010-06-09 09:58:17 +00:00