llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-29 13:54:57 +00:00

History

Chris Lattner 330ea12667 fix something-o git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24987 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-23 07:08:39 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp	add fneg/fabs support for doubles	2005-12-19 00:50:12 +00:00
Makefile
README.txt	remove benchmark list, remove issues addressed by the dag-dag isel	2005-12-23 06:09:30 +00:00
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp
SparcV8InstrFormats.td
SparcV8InstrInfo.cpp
SparcV8InstrInfo.h
SparcV8InstrInfo.td	fix the int<->fp instructions, which apparently take a single float register	2005-12-23 05:00:16 +00:00
SparcV8ISelDAGToDAG.cpp	fix something-o	2005-12-23 07:08:39 +00:00
SparcV8ISelSimple.cpp	Elimiante SP and FP, which weren't members of the IntRegs register class	2005-12-19 00:06:52 +00:00
SparcV8RegisterInfo.cpp	Reserve G1 for frame offset stuff and use it to handle large stack frames.	2005-12-20 07:56:31 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td	Reserve G1 for frame offset stuff and use it to handle large stack frames.	2005-12-20 07:56:31 +00:00
SparcV8TargetMachine.cpp	Run lower-switch after lower-invoke.	2005-12-20 08:00:11 +00:00
SparcV8TargetMachine.h

README.txt

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* open code 64-bit shifts
* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.