llvm-6502/lib/Target/SparcV8
Chris Lattner e7f96c515e Substantially improve the code generated by non-folded setcc instructions.
In particular, instead of compiling this:

bool %test(int %A, int %B) {
  %C = setlt int %A, %B
  ret bool %C
}

to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        bl .LBBtest_1   !
        nop
        ba .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, 1, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_2:     !
        or %g0, 0, %i0
        ba .LBBtest_3   !
        nop
.LBBtest_3:     !
        restore %g0, %g0, %g0
        retl
        nop

We now compile it to this:

test:
        save %sp, -96, %sp
        subcc %i0, %i1, %g0
        or %g0, 1, %i0
        bl .LBBtest_2   !
        nop
.LBBtest_1:     !
        or %g0, %g0, %i0
.LBBtest_2:     !
        restore %g0, %g0, %g0
        retl
        nop


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19213 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-01 16:06:57 +00:00
..
DelaySlotFiller.cpp Use TargetMachine::hasDelaySlot() instead of our old switch statement 2004-09-30 04:04:47 +00:00
FPMover.cpp When FpMOVDs appeared in pairs, we were mistakenly skipping over the latter of 2004-12-10 04:42:45 +00:00
Makefile Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
README.txt The mystery of Olden/tsp solved, and more opportunities for speedup. 2004-12-14 09:10:10 +00:00
SparcV8.h Add createSparcV8FPMoverPass(). 2004-09-29 03:25:39 +00:00
SparcV8.td Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
SparcV8AsmPrinter.cpp Fix asm-printing directives (how did we not see this before...apparently, 2004-12-09 18:51:01 +00:00
SparcV8CodeEmitter.cpp This code rotted - change it to call abort() until someone wants 2004-12-03 06:57:14 +00:00
SparcV8InstrFormats.td Class F2_1 already inherits the imm22 field from class F2 2004-10-14 22:32:24 +00:00
SparcV8InstrInfo.cpp Look for many more moves to fold (previously, we only 2004-12-11 05:19:03 +00:00
SparcV8InstrInfo.h I think that V8 should coallesce registers, don't you? 2004-07-25 06:19:04 +00:00
SparcV8InstrInfo.td Add the rest of the multiply instructions. 2004-12-10 08:39:29 +00:00
SparcV8ISelSimple.cpp Substantially improve the code generated by non-folded setcc instructions. 2005-01-01 16:06:57 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp Remove dependency on MRegisterInfo::getRegClass 2004-10-29 21:42:27 +00:00
SparcV8RegisterInfo.h Code insertion methods now return void instead of an int. 2004-08-15 22:15:11 +00:00
SparcV8RegisterInfo.td Make this file self-contained. 2004-12-10 04:46:30 +00:00
SparcV8TargetMachine.cpp Use the target triple to pick this target. 2004-12-12 17:40:28 +00:00
SparcV8TargetMachine.h Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the 2004-10-09 05:57:01 +00:00

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing an expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current expected test failures
------------------------------

Here are the currently-expected SingleSource failures for V8
(Some C++ programs are crashing in libstdc++ at the moment;
I'm not sure why.)

  (llc) SingleSource/Regression/C++/EH/exception_spec_test
  (llc) SingleSource/Regression/C++/EH/throw_rethrow_test

Here are the currently-expected MultiSource failures for V8:

  (llc,cbe) MultiSource/Applications/d/make_dparser
  (llc,cbe) MultiSource/Applications/hexxagon
  (llc) MultiSource/Benchmarks/Fhourstones
  (llc,cbe) MultiSource/Benchmarks/McCat/03-testtrie
  (llc) MultiSource/Benchmarks/McCat/18-imp
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/bison/mybison
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/fixoutput
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/gnugo
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/plot2fig
  (llc,cbe) MultiSource/Benchmarks/Ptrdist/anagram
  (llc,cbe) MultiSource/Benchmarks/FreeBench/analyzer
    * DANGER * analyzer will run the machine out of VM
  (I don't know whether the following fail in cbe:)
  (llc) MultiSource/Benchmarks/FreeBench/distray
  (llc) MultiSource/Benchmarks/FreeBench/fourinarow
  (llc) MultiSource/Benchmarks/FreeBench/pifft
  (llc) MultiSource/Benchmarks/MallocBench/gs
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv1
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv2

Known SPEC failures for V8 (probably not an exhaustive list):

  (llc) 134.perl
  (llc) 177.mesa
  (llc) 188.ammp -- FPMover bug?
  (llc) 256.bzip2
  (llc,cbe) 130.li
  (native,llc,cbe) 126.gcc
  (native,llc,cbe) 255.vortex

To-do
-----

* support shl on longs (fourinarow needs this)
* support casting 64-bit integers to FP types (fhourstones needs this)
* support FP rem (call fmod)

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.

* Change code like this:
        or      %o0, %lo(.CPI_main_0), %o0
        ld      [%o0+0], %o0
  into:
        ld	[%o0+%lo(.CPI_main_0)], %o0
  for constant pool access.

* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.

* Directly support select instructions, and fold setcc instructions into them
  where possible.  I think this is what afflicts the inner loop of Olden/tsp
  (hot block = tsp():no_exit.1.i, overall GCC/LLC = 0.03).

* Generate fsqrtd for calls to sqrt()  (~ 4% speedup on Olden/tsp).

$Date$