Preston Gurd 6a8c7bf8e7 This patch fixes a problem which arose when using the Post-RA scheduler ... on X86 Atom. Some of our tests failed because the tail merging part of the BranchFolding pass was creating new basic blocks which did not contain live-in information. When the anti-dependency code in the Post-RA scheduler ran, it would sometimes rename the register containing the function return value because the fact that the return value was live-in to the subsequent block had been lost. To fix this, it is necessary to run the RegisterScavenging code in the BranchFolding pass. This patch makes sure that the register scavenging code is invoked in the X86 subtarget only when post-RA scheduling is being done. Post RA scheduling in the X86 subtarget is only done for Atom. This patch adds a new function to the TargetRegisterClass to control whether or not live-ins should be preserved during branch folding. This is necessary in order for the anti-dependency optimizations done during the PostRASchedulerList pass to work properly when doing Post-RA scheduling for the X86 in general and for the Intel Atom in particular. The patch adds and invokes the new function trackLivenessAfterRegAlloc() instead of using the existing requiresRegisterScavenging(). It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of requiresRegisterScavenging(). It changes the all the targets that implemented requiresRegisterScavenging() to also implement trackLivenessAfterRegAlloc(). It adds an assertion in the Post RA scheduler to make sure that post RA liveness information is available when it is needed. It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order to avoid running into the added assertion. Finally, this patch restores the use of anti-dependency checking (which was turned off temporarily for the 3.1 release) for Intel Atom in the Post RA scheduler. Patch by Andy Zhang! Thanks to Jakob and Anton for their reviews. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155395 91177308-0d34-0410-b5e6-96231b3b80d8		2012-04-23 21:39:35 +00:00
..
AsmParser
Disassembler	Delete latter half of CMakeLists.txt.	2012-04-17 18:18:09 +00:00
InstPrinter	Move getOpcodeName from the various target InstPrinters into the superclass MCInstPrinter.	2012-04-02 08:32:38 +00:00
MCTargetDesc	Remove some potential warnings about variables used uninitialized.	2012-04-22 07:23:04 +00:00
TargetInfo
CMakeLists.txt	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
LLVMBuild.txt	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
Makefile	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
Mips64InstrInfo.td	Delete blank line.	2012-04-18 18:47:17 +00:00
Mips.h	Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.	2012-03-17 18:46:09 +00:00
Mips.td
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.	2012-04-20 07:30:17 +00:00
MipsAsmPrinter.h	Emit all directives except for ".cprestore" during asm printing rather than emit	2012-03-28 00:22:50 +00:00
MipsCallingConv.td
MipsCodeEmitter.cpp
MipsCondMov.td	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
MipsDelaySlotFiller.cpp
MipsEmitGPRestore.cpp
MipsExpandPseudo.cpp
MipsFrameLowering.cpp	Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.	2012-04-20 07:30:17 +00:00
MipsFrameLowering.h
MipsInstrFormats.td	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
MipsInstrFPU.td	Add disassembler to MIPS.	2012-04-17 18:03:21 +00:00
MipsInstrInfo.cpp	Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.	2012-04-20 07:30:17 +00:00
MipsInstrInfo.h	Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.	2012-03-17 18:46:09 +00:00
MipsInstrInfo.td	Mark instruction classes ArithLogicR, ArithLogicI and LoadUpper as isRematerializable.	2012-04-18 18:52:10 +00:00
MipsISelDAGToDAG.cpp	Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.	2012-04-20 07:30:17 +00:00
MipsISelLowering.cpp	llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build on MSVC.	2012-04-21 15:31:45 +00:00
MipsISelLowering.h	Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.	2012-04-11 22:49:04 +00:00
MipsJITInfo.cpp
MipsJITInfo.h	Prune some includes	2012-03-27 07:54:11 +00:00
MipsMachineFunction.cpp	Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.	2012-04-20 07:30:17 +00:00
MipsMachineFunction.h	Add member EmitNOAT and its setter and getter functions to class MipsFunctionInfo.	2012-03-27 19:08:42 +00:00
MipsMCInstLower.cpp	Emit all directives except for ".cprestore" during asm printing rather than emit	2012-03-28 00:22:50 +00:00
MipsMCInstLower.h	Emit all directives except for ".cprestore" during asm printing rather than emit	2012-03-28 00:22:50 +00:00
MipsRegisterInfo.cpp	This patch fixes a problem which arose when using the Post-RA scheduler	2012-04-23 21:39:35 +00:00
MipsRegisterInfo.h	This patch fixes a problem which arose when using the Post-RA scheduler	2012-04-23 21:39:35 +00:00
MipsRegisterInfo.td
MipsRelocations.h
MipsSchedule.td
MipsSelectionDAGInfo.cpp
MipsSelectionDAGInfo.h
MipsSubtarget.cpp	Turn off post-RA scheduler by default.	2012-03-28 00:52:23 +00:00
MipsSubtarget.h	Turn on post register allocation scheduler.	2012-03-28 00:24:17 +00:00
MipsTargetMachine.cpp	Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.	2012-03-17 18:46:09 +00:00
MipsTargetMachine.h	Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.	2012-03-17 18:46:09 +00:00
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h