llvm-6502/test/CodeGen
Silviu Baranga 3f11cd0d25 [ARM] When generating a vpaddl node the input lane type is not always the type of the
add operation since extract_vector_elt can perform an extend operation. Get the input lane
type from the vector on which we're performing the vpaddl operation on and extend or
truncate it to the output type of the original add node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205523 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-03 10:44:27 +00:00
..
AArch64
ARM [ARM] When generating a vpaddl node the input lane type is not always the type of the 2014-04-03 10:44:27 +00:00
ARM64 ARM64: add regression test for r205519. 2014-04-03 09:36:05 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Add more Octeon cnMips instructions 2014-04-02 18:40:43 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX Fix for PR19099 - NVPTX produces invalid symbol names. 2014-03-31 15:56:26 +00:00
PowerPC [PowerPC] Add some missing VSX bitcast patterns 2014-04-01 19:24:27 +00:00
R600 TargetLibraryInfo: Disable memcpy and memset on R600 2014-04-02 19:53:29 +00:00
SPARC
SystemZ
Thumb ARM: cortex-m0 doesn't support unaligned memory access. 2014-04-02 19:28:13 +00:00
Thumb2 ARM: Add support for segmented stacks 2014-04-02 16:10:33 +00:00
X86 Fix test case. 2014-04-03 00:14:18 +00:00
XCore