llvm-6502/lib/Target/Hexagon
Sirish Pande b9f69a41fc Test for commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 15:20:33 +00:00
..
MCTargetDesc Test for commit access. 2012-02-09 15:20:33 +00:00
TargetInfo Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies(). 2011-12-13 00:36:04 +00:00
CMakeLists.txt Fix the cmake build 2012-02-01 23:40:51 +00:00
Hexagon.h Add MCTargetDesc library to Hexagon target 2011-12-15 22:29:08 +00:00
Hexagon.td
HexagonAsmPrinter.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonCallingConv.td
HexagonCallingConvLower.cpp
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonExpandPredSpillCode.cpp Hexagon: Remove forbidden iostream includes (it introduces static initializers) 2012-02-06 10:19:29 +00:00
HexagonFrameLowering.cpp Hexagon: Remove forbidden iostream includes (it introduces static initializers) 2012-02-06 10:19:29 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp
HexagonImmediates.td
HexagonInstrFormats.td Use TSFlag bit to describe instruction properties. 2012-02-08 18:25:47 +00:00
HexagonInstrFormatsV4.td
HexagonInstrInfo.cpp Use TSFlag bit to describe instruction properties. 2012-02-08 18:25:47 +00:00
HexagonInstrInfo.h Use TSFlag bit to describe instruction properties. 2012-02-08 18:25:47 +00:00
HexagonInstrInfo.td Use TSFlag bit to describe instruction properties. 2012-02-08 18:25:47 +00:00
HexagonInstrInfoV3.td
HexagonInstrInfoV4.td Use TSFlag bit to describe instruction properties. 2012-02-08 18:25:47 +00:00
HexagonIntrinsics.td
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonISelDAGToDAG.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonISelLowering.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonISelLowering.h
HexagonMachineFunctionInfo.h
HexagonOptimizeSZExtends.cpp
HexagonRegisterInfo.cpp Convert assert(0) to llvm_unreachable 2012-02-07 02:50:20 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td Add a CoveredBySubRegs property to Register descriptions. 2012-01-18 00:16:39 +00:00
HexagonRemoveSZExtArgs.cpp Hexagon: Remove forbidden iostream includes (it introduces static initializers) 2012-02-06 10:19:29 +00:00
HexagonSchedule.td
HexagonScheduleV4.td
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitTFRCondSets.cpp Hexagon: Remove forbidden iostream includes (it introduces static initializers) 2012-02-06 10:19:29 +00:00
HexagonSubtarget.cpp VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 2012-02-01 22:13:57 +00:00
HexagonSubtarget.h
HexagonTargetMachine.cpp Codegen pass definition cleanup. No functionality. 2012-02-08 21:23:13 +00:00
HexagonTargetMachine.h TargetPassConfig: confine the MC configuration to TargetMachine. 2012-02-04 02:56:59 +00:00
HexagonTargetObjectFile.cpp
HexagonTargetObjectFile.h
HexagonVarargsCallingConvention.h
LLVMBuild.txt Add MCTargetDesc library to Hexagon target 2011-12-15 22:29:08 +00:00
Makefile VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 2012-02-01 22:13:57 +00:00