llvm-6502/test/CodeGen
Jakob Stoklund Olesen 45d34fe358 Fix http://llvm.org/bugs/show_bug.cgi?id=4583
Inline asm instructions may have additional <imp-def,kill> register operands.
These operands are not marked with a flag like the normal asm operands, so we
must not assert that there is a flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-19 19:09:59 +00:00
..
Alpha Make promotion in operation legalization for SETCC work correctly. 2009-07-17 05:16:04 +00:00
ARM fix an arm codegen bug (the same as PR4482 on ppc) where available_externally 2009-07-15 04:12:33 +00:00
CBackend
CellSPU
CPP
Generic
IA64
Mips
MSP430
PowerPC Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands. 2009-07-16 20:58:34 +00:00
SPARC
SystemZ Enable cross register class coalescing. 2009-07-18 02:10:10 +00:00
Thumb
Thumb2 Emit cross regclass register moves for thumb2. 2009-07-16 23:26:06 +00:00
X86 Fix http://llvm.org/bugs/show_bug.cgi?id=4583 2009-07-19 19:09:59 +00:00
XCore Combine an unaligned store of unaligned load into a memmove. 2009-07-16 12:50:48 +00:00