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llvm-6502/lib/Target/Hexagon
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Colin LeMahieu 47d6e4d009 [Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-04 17:52:06 +00:00
..
Disassembler
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MCTargetDesc
Remove dead code in the HexagonMCInst classes. This also fixes
2015-02-02 22:40:53 +00:00
TargetInfo
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CMakeLists.txt
Update CMake build for removed files.
2015-02-02 18:52:49 +00:00
Hexagon.h
Remove unused class variables and update all callers/uses from
2015-02-02 22:28:44 +00:00
Hexagon.td
Migrate HexagonISelDAGToDAG to setting a subtarget pointer during
2015-02-02 19:22:03 +00:00
HexagonAsmPrinter.cpp
Define a runOnMachineFunction for the Hexagon AsmPrinter and
2015-02-03 06:40:22 +00:00
HexagonAsmPrinter.h
Define a runOnMachineFunction for the Hexagon AsmPrinter and
2015-02-03 06:40:22 +00:00
HexagonCallingConv.td
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HexagonCFGOptimizer.cpp
Grab TargetInstrInfo off of the MachineFunction and remove
2015-02-02 18:46:27 +00:00
HexagonCopyToCombine.cpp
Use the function template getSubtarget to remove an explicit cast.
2015-02-02 18:46:29 +00:00
HexagonExpandPredSpillCode.cpp
Sink queries into asserts since the variable is unused otherwise.
2015-02-02 18:58:24 +00:00
HexagonFixupHwLoops.cpp
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HexagonFrameLowering.cpp
Use the getSubtarget call off of the MachineFunction rather than
2015-02-02 19:22:01 +00:00
HexagonFrameLowering.h
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HexagonHardwareLoops.cpp
Remove unused class variables and update calls to get the subtarget
2015-02-02 19:05:28 +00:00
HexagonInstrFormats.td
[Hexagon] Revert change to isCodeGenOnly = 1 in r228080
2015-02-04 00:09:23 +00:00
HexagonInstrFormatsV4.td
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HexagonInstrInfo.cpp
[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.
2015-02-04 17:52:06 +00:00
HexagonInstrInfo.h
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HexagonInstrInfo.td
[Hexagon] Changing some isCodeGenOnly to isAsmParserOnly since we want them to asm parse but not cause decode conflicts.
2015-02-04 00:07:26 +00:00
HexagonInstrInfoV3.td
[Hexagon] Changing some isCodeGenOnly to isAsmParserOnly since we want them to asm parse but not cause decode conflicts.
2015-02-04 00:07:26 +00:00
HexagonInstrInfoV4.td
[Hexagon] Adding encoding information for absolute-reg mode stores. Xfailing a test until constant extenders are correctly put in the same packet.
2015-02-04 17:52:06 +00:00
HexagonInstrInfoV5.td
[Hexagon] Changing some isCodeGenOnly to isAsmParserOnly since we want them to asm parse but not cause decode conflicts.
2015-02-04 00:07:26 +00:00
HexagonInstrInfoVector.td
[Hexagon] Adding vector shift instructions and tests.
2015-01-30 21:58:46 +00:00
HexagonIntrinsics.td
[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns and updating tests.
2015-02-03 20:40:52 +00:00
HexagonIntrinsicsDerived.td
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HexagonIntrinsicsV3.td
[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns and updating tests.
2015-02-03 20:40:52 +00:00
HexagonIntrinsicsV4.td
[Hexagon] Updating XTYPE/PRED intrinsics.
2015-02-03 19:43:59 +00:00
HexagonIntrinsicsV5.td
[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning out old intrinsic patterns and updating tests.
2015-02-03 20:40:52 +00:00
HexagonISelDAGToDAG.cpp
Migrate HexagonISelDAGToDAG to setting a subtarget pointer during
2015-02-02 19:22:03 +00:00
HexagonISelLowering.cpp
Only access TLOF via the TargetMachine, not TargetLowering.
2015-02-03 07:22:52 +00:00
HexagonISelLowering.h
Cache and use the subtarget that owns the target lowering.
2015-02-02 22:11:36 +00:00
HexagonMachineFunctionInfo.cpp
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HexagonMachineFunctionInfo.h
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HexagonMachineScheduler.cpp
Move HexagonMachineScheduler to use the subtarget off of the
2015-02-02 22:11:40 +00:00
HexagonMachineScheduler.h
Move HexagonMachineScheduler to use the subtarget off of the
2015-02-02 22:11:40 +00:00
HexagonMCInstLower.cpp
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HexagonNewValueJump.cpp
Remove #if'd code and update comment.
2015-02-02 22:11:42 +00:00
HexagonOperands.td
Migrate HexagonISelDAGToDAG to setting a subtarget pointer during
2015-02-02 19:22:03 +00:00
HexagonPeephole.cpp
Use the cached subtarget on the MachineFunction.
2015-02-02 22:40:56 +00:00
HexagonRegisterInfo.cpp
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HexagonRegisterInfo.h
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HexagonRegisterInfo.td
[Hexagon] Adding vector shift instructions and tests.
2015-01-30 21:58:46 +00:00
HexagonRemoveSZExtArgs.cpp
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HexagonSchedule.td
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HexagonScheduleV4.td
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HexagonSelectCCInfo.td
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HexagonSelectionDAGInfo.cpp
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HexagonSelectionDAGInfo.h
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HexagonSplitConst32AndConst64.cpp
Migrate the HexagonSplitConst32AndConst64 pass from TargetMachine
2015-02-02 22:11:43 +00:00
HexagonSplitTFRCondSets.cpp
Remove unused class variables and update all callers/uses from
2015-02-02 22:28:44 +00:00
HexagonSubtarget.cpp
Cache and use the subtarget that owns the target lowering.
2015-02-02 22:11:36 +00:00
HexagonSubtarget.h
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HexagonTargetMachine.cpp
Remove unused class variables and update all callers/uses from
2015-02-02 22:28:44 +00:00
HexagonTargetMachine.h
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HexagonTargetObjectFile.cpp
Compute the ELF SectionKind from the flags.
2015-01-29 17:33:21 +00:00
HexagonTargetObjectFile.h
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HexagonVLIWPacketizer.cpp
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LLVMBuild.txt
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Makefile
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