Evan Cheng 753480ad20 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-20 19:47:55 +00:00
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Alpha	Make promotion in operation legalization for SETCC work correctly.	2009-07-17 05:16:04 +00:00
ARM	fix an arm codegen bug (the same as PR4482 on ppc) where available_externally	2009-07-15 04:12:33 +00:00
CBackend
CellSPU
CPP
Generic	remove tests for removed intrinsics.	2009-07-12 21:30:06 +00:00
IA64
Mips
MSP430
PowerPC	Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.	2009-07-16 20:58:34 +00:00
SPARC
SystemZ	Enable cross register class coalescing.	2009-07-18 02:10:10 +00:00
Thumb	Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.	2009-07-20 19:47:55 +00:00
Thumb2	Emit cross regclass register moves for thumb2.	2009-07-16 23:26:06 +00:00
X86	Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.	2009-07-20 19:47:55 +00:00
XCore	Combine an unaligned store of unaligned load into a memmove.	2009-07-16 12:50:48 +00:00