Jim Grosbach 4af58f145d ARM64: [su]xtw use W regs as inputs, not X regs. ... Update the SXT[BHW]/UXTW instruction aliases and the shifted reg addressing mode handling. PR19455 and rdar://16650642 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206495 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-17 20:47:31 +00:00
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Analysis	Fix a bug in which BranchProbabilityInfo wasn't setting branch weights of basic blocks inside loops correctly.	2014-04-14 16:56:19 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	ARM64: [su]xtw use W regs as inputs, not X regs.	2014-04-17 20:47:31 +00:00
DebugInfo	Change argument order and add explanatory comment to r206130	2014-04-14 22:23:06 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation	[asan] add two new hidden compile-time flags for asan: asan-instrumentation-with-call-threshold and asan-memory-access-callback-prefix. This is part of the workaround for PR17409 (instrument huge functions with callbacks instead of inlined code). These flags will also help us experiment with kasan (kernel-asan) and clang	2014-04-16 12:12:19 +00:00
Integer
JitListener
Linker
LTO
MC	ARM64: [su]xtw use W regs as inputs, not X regs.	2014-04-17 20:47:31 +00:00
Object	[yaml2obj][ELF] ELF Relocations Support.	2014-04-11 04:13:39 +00:00
Other	Add -pass-remarks flag to 'opt'.	2014-04-08 16:42:38 +00:00
TableGen
tools	tools: fix invalid printing, buffer overrun in llvm-readobj	2014-04-16 04:15:29 +00:00
Transforms	Reverse 206485.	2014-04-17 19:14:06 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh