llvm-6502/lib/Target/R600
Rafael Espindola 812789dd3d Fix use after free (pr16103).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182482 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-22 15:31:11 +00:00
..
InstPrinter R600: Improve texture handling 2013-05-17 16:50:20 +00:00
MCTargetDesc s/u_int32_t/uint32_t/ 2013-05-22 01:36:19 +00:00
TargetInfo
AMDGPU.h R600: Improve texture handling 2013-05-17 16:50:20 +00:00
AMDGPU.td
AMDGPUAsmPrinter.cpp R600: Emit config values in register / value pairs 2013-05-06 17:50:51 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUIndirectAddressing.cpp
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td Create an FPOW SDNode opcode def in the target independent .td file rather than in a specific backend. 2013-05-22 06:36:09 +00:00
AMDGPUInstructions.td R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
AMDGPUIntrinsics.td
AMDGPUISelLowering.cpp R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
AMDGPUISelLowering.h R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUStructurizeCFG.cpp
AMDGPUSubtarget.cpp R600: Factorize Fetch size limit inside AMDGPUSubTarget 2013-05-17 16:49:55 +00:00
AMDGPUSubtarget.h R600: Factorize Fetch size limit inside AMDGPUSubTarget 2013-05-17 16:49:55 +00:00
AMDGPUTargetMachine.cpp R600: Improve texture handling 2013-05-17 16:50:20 +00:00
AMDGPUTargetMachine.h
AMDIL7XXDevice.cpp
AMDIL7XXDevice.h
AMDIL.h
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILDevice.cpp
AMDILDevice.h
AMDILDeviceInfo.cpp R600/SI: Add processor type for Hainan asic 2013-05-14 14:42:56 +00:00
AMDILDeviceInfo.h
AMDILDevices.h
AMDILEvergreenDevice.cpp
AMDILEvergreenDevice.h
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp Check that a function starts with llvm. before using GET_FUNCTION_RECOGNIZER. 2013-05-22 14:57:42 +00:00
AMDILIntrinsicInfo.h
AMDILIntrinsics.td
AMDILISelDAGToDAG.cpp
AMDILISelLowering.cpp R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
AMDILNIDevice.cpp
AMDILNIDevice.h
AMDILRegisterInfo.td
AMDILSIDevice.cpp
AMDILSIDevice.h
CMakeLists.txt R600: Improve texture handling 2013-05-17 16:50:20 +00:00
LLVMBuild.txt
Makefile
Processors.td R600/SI: Add processor type for Hainan asic 2013-05-14 14:42:56 +00:00
R600ControlFlowFinalizer.cpp R600: Some factorization 2013-05-17 16:50:02 +00:00
R600Defines.h R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600EmitClauseMarkers.cpp R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600ExpandSpecialInstrs.cpp Fix warning in non-assert build. 2013-05-22 01:29:38 +00:00
R600InstrInfo.cpp R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600InstrInfo.h R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600Instructions.td R600: Swap the legality of rotl and rotr 2013-05-20 15:02:19 +00:00
R600Intrinsics.td R600: Improve texture handling 2013-05-17 16:50:20 +00:00
R600ISelLowering.cpp R600ISelLowering.cpp: Avoid "using namespace Intrinsic;" to appease MSC. Specify namespaces explicitly here. 2013-05-22 06:37:31 +00:00
R600ISelLowering.h Add LLVMContext argument to getSetCCResultType 2013-05-18 00:21:46 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600MachineScheduler.h R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600Packetizer.cpp R600: Relax some vector constraints on Dot4. 2013-05-17 16:50:32 +00:00
R600RegisterInfo.cpp R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600RegisterInfo.h R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
R600RegisterInfo.td R600: Rename 128 bit registers. 2013-05-17 16:50:09 +00:00
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp Fix use after free (pr16103). 2013-05-22 15:31:11 +00:00
SIAnnotateControlFlow.cpp
SIDefines.h
SIInsertWaits.cpp
SIInstrFormats.td R600/SI: Use the same names for VOP3 operands and encoding fields 2013-05-20 15:02:08 +00:00
SIInstrInfo.cpp
SIInstrInfo.h
SIInstrInfo.td R600/SI: Use a multiclass for MUBUF_Load_Helper 2013-05-20 15:02:31 +00:00
SIInstructions.td R600/SI: Use a multiclass for MUBUF_Load_Helper 2013-05-20 15:02:31 +00:00
SIIntrinsics.td R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode 2013-05-06 23:02:19 +00:00
SIISelLowering.cpp Attempt to fix the mingw32 bot. 2013-05-22 02:30:47 +00:00
SIISelLowering.h R600/SI: Make fitsRegClass() operands const 2013-05-20 15:02:01 +00:00
SILowerControlFlow.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td