llvm-6502/test/CodeGen
Reed Kotler 61b97b8c17 When Mips16 frames grow large, the immediate field may exceed the maximum
allowed size for the instruction. This code uses RegScavenger to fix this.
We sometimes need 2 registers for Mips16 so we must handle things
differently than how register scavenger is normally used.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
..
AArch64 Implement external weak (ELF) symbols on AArch64 2013-02-06 16:43:33 +00:00
ARM Attempt to recover gdb bot after r174445. 2013-02-06 00:59:41 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle 2013-02-05 19:20:45 +00:00
MBlaze
Mips When Mips16 frames grow large, the immediate field may exceed the maximum 2013-02-08 03:57:41 +00:00
MSP430 Add support for varargs functions for msp430. 2012-11-21 17:28:27 +00:00
NVPTX [NVPTX] Fix crash with unnamed struct arguments 2012-12-05 20:50:28 +00:00
PowerPC Disable a couple more vector splat optimizations on PPC. 2013-02-04 15:52:32 +00:00
R600 R600: Add support for SET*_DX10 instructions 2013-02-07 14:02:35 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC
Thumb Use the 'count' attribute to calculate the upper bound of an array. 2012-12-04 21:34:03 +00:00
Thumb2 FileCheck-ify some grep tests 2013-01-25 22:11:46 +00:00
X86 This is a follow-up on r174446, now taking Atom processors into 2013-02-06 20:43:57 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00