Rafael Espindola 355746359e initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8		2006-07-18 17:00:30 +00:00
..
.cvsignore	Ignore generated files	2006-05-27 01:23:30 +00:00
ARM.h
ARM.td	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	2006-05-18 00:12:58 +00:00
ARMAsmPrinter.cpp	skeleton of a lowerCall implementation for ARM	2006-07-16 01:02:57 +00:00
ARMInstrInfo.cpp	create the raddr addressing mode that matches any register and the frame index	2006-07-10 01:41:35 +00:00
ARMInstrInfo.h	create the raddr addressing mode that matches any register and the frame index	2006-07-10 01:41:35 +00:00
ARMInstrInfo.td	initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)	2006-07-18 17:00:30 +00:00
ARMISelDAGToDAG.cpp	skeleton of a lowerCall implementation for ARM	2006-07-16 01:02:57 +00:00
ARMRegisterInfo.cpp	initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)	2006-07-18 17:00:30 +00:00
ARMRegisterInfo.h	getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.	2006-05-18 00:12:58 +00:00
ARMRegisterInfo.td	initial implementation of ARMRegisterInfo::eliminateFrameIndex	2006-06-18 00:08:07 +00:00
ARMTargetMachine.cpp	Don't pass target name into TargetData anymore, it is never used or needed.	2006-06-16 18:22:52 +00:00
ARMTargetMachine.h
Makefile