Tim Northover 6ff20f205b AArch64: be more careful resorting to inefficient addressing for weak vars. ... If an otherwise weak var is actually defined in this unit, it can't be undefined at runtime so we can use normal global variable sequences (ADRP/ADD) to access it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176259 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-28 14:36:31 +00:00
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AArch64	AArch64: be more careful resorting to inefficient addressing for weak vars.	2013-02-28 14:36:31 +00:00
ARM	ARM: FMA is legal only if VFP4 is available.	2013-02-27 21:31:12 +00:00
CPP
Generic	For inline asm:	2013-01-11 18:12:39 +00:00
Hexagon	Hexagon: Expand cttz, ctlz, and ctpop for now.	2013-02-21 19:39:40 +00:00
MBlaze
Mips	Expand pseudos/macros for Selt. This is the last of the complex	2013-02-23 03:09:56 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX	[NVPTX] Disable vector registers	2013-02-12 14:18:49 +00:00
PowerPC	Fix PR15332 (patch by Florian Zeitz).	2013-02-26 21:28:57 +00:00
R600	R600: Fix for Unigine when MachineSched is enabled	2013-02-21 15:06:59 +00:00
SI	Add R600 backend	2012-12-11 21:25:42 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Fix thumbv5e frame lowering assertion failure.	2013-02-20 12:21:33 +00:00
Thumb2	Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.	2013-02-22 10:01:33 +00:00
X86	Add a test case for r176066.	2013-02-26 20:22:30 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00