Evan Cheng 753480ad20 Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8		2009-07-20 19:47:55 +00:00
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Alpha	Make promotion in operation legalization for SETCC work correctly.	2009-07-17 05:16:04 +00:00
ARM
CBackend	Fix an erroneous check for isFNeg; the FNeg case is handled	2009-06-04 23:43:29 +00:00
CellSPU
CPP
Generic
IA64
Mips
MSP430
PowerPC
SPARC
SystemZ	Enable cross register class coalescing.	2009-07-18 02:10:10 +00:00
Thumb	Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.	2009-07-20 19:47:55 +00:00
Thumb2
X86	Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.	2009-07-20 19:47:55 +00:00
XCore