llvm-6502/test/CodeGen
2012-02-05 19:27:57 +00:00
..
ARM [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too. 2012-02-04 00:39:19 +00:00
CBackend
CellSPU Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT. 2012-01-17 21:44:01 +00:00
CPP Testcase for commit 149833 (use of an uninitialized variable noticed 2012-02-05 19:27:57 +00:00
Generic Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm. 2012-02-02 11:44:58 +00:00
Hexagon VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 2012-02-01 22:13:57 +00:00
MBlaze
Mips Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 2012-02-03 04:33:00 +00:00
MSP430
PowerPC AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit 2012-01-16 22:53:41 +00:00
PTX PTX: Continue to fix up the register mess. 2011-12-06 17:39:48 +00:00
SPARC
Thumb
Thumb2 After r147827 and r147902, it's now possible for unallocatable registers to be 2012-01-14 01:53:46 +00:00
X86 Testing vector code without sse doesn't make much sense. 2012-02-05 11:19:39 +00:00
XCore