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InstPrinter
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
MCTargetDesc
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Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.
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2013-03-28 19:34:49 +00:00 |
TargetInfo
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
CMakeLists.txt
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
Hexagon.h
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
Hexagon.td
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Move generic Hexagon subtarget information into Hexagon.td
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2012-12-04 04:29:16 +00:00 |
HexagonAsmPrinter.cpp
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
HexagonAsmPrinter.h
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Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.
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2012-12-29 15:23:06 +00:00 |
HexagonCallingConv.td
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Hexagon V5 FP Support.
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2012-05-10 20:20:25 +00:00 |
HexagonCallingConvLower.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
HexagonCallingConvLower.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
HexagonCFGOptimizer.cpp
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Use the new script to sort the includes of every file under lib.
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2012-12-03 16:50:05 +00:00 |
HexagonExpandPredSpillCode.cpp
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Use the new script to sort the includes of every file under lib.
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2012-12-03 16:50:05 +00:00 |
HexagonFixupHwLoops.cpp
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Extend Hexagon hardware loop generation to handle various additional cases:
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2013-02-11 21:37:55 +00:00 |
HexagonFrameLowering.cpp
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Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
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2013-02-21 20:05:00 +00:00 |
HexagonFrameLowering.h
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Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
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2013-02-21 20:05:00 +00:00 |
HexagonHardwareLoops.cpp
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Switch to LLVM support function abs64 to keep VS2008 happy.
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2013-03-27 13:15:08 +00:00 |
HexagonInstrFormats.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
HexagonInstrFormatsV4.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
HexagonInstrInfo.cpp
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Hexagon: Replace switch-case in isDotNewInst with TSFlags.
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2013-03-28 19:44:04 +00:00 |
HexagonInstrInfo.h
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Hexagon: Replace switch-case in isDotNewInst with TSFlags.
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2013-03-28 19:44:04 +00:00 |
HexagonInstrInfo.td
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Hexagon: Replace switch-case in isDotNewInst with TSFlags.
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2013-03-28 19:44:04 +00:00 |
HexagonInstrInfoV3.td
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Remove variable_ops from call instructions in most targets.
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2012-07-13 20:44:29 +00:00 |
HexagonInstrInfoV4.td
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Hexagon: Use multiclass for gp-relative instructions.
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2013-03-28 16:25:57 +00:00 |
HexagonInstrInfoV5.td
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Revert 156634 upon request until code improvement changes are made.
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2012-05-14 19:35:42 +00:00 |
HexagonIntrinsics.td
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Hexagon V5 intrinsics support.
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2012-05-11 19:39:13 +00:00 |
HexagonIntrinsicsDerived.td
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Hexagon V5 intrinsics support.
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2012-05-11 19:39:13 +00:00 |
HexagonIntrinsicsV3.td
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HexagonIntrinsicsV4.td
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HexagonIntrinsicsV5.td
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Remove tabs.
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2012-07-19 00:25:04 +00:00 |
HexagonISelDAGToDAG.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
HexagonISelLowering.cpp
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DAGCombiner: Use correct value type for checking legality of BR_CC v3
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2013-03-08 15:36:57 +00:00 |
HexagonISelLowering.h
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Hexagon: Add support to lower block address.
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2013-03-07 19:10:28 +00:00 |
HexagonMachineFunctionInfo.h
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HexagonMachineScheduler.cpp
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Cleanup #includes.
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2013-03-10 13:11:23 +00:00 |
HexagonMachineScheduler.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
HexagonMCInstLower.cpp
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Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.
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2013-02-20 16:13:27 +00:00 |
HexagonNewValueJump.cpp
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Use the new script to sort the includes of every file under lib.
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2012-12-03 16:50:05 +00:00 |
HexagonOperands.td
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Move all operand definitions into HexagonOperands.td
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2012-12-04 05:00:31 +00:00 |
HexagonPeephole.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
HexagonRegisterInfo.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
HexagonRegisterInfo.h
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Remove code copied from GenRegisterInfo.inc.
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2013-02-22 01:15:08 +00:00 |
HexagonRegisterInfo.td
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Hexagon V5 FP Support.
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2012-05-10 20:20:25 +00:00 |
HexagonRemoveSZExtArgs.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
HexagonSchedule.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
HexagonScheduleV4.td
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Hexagon: Change insn class to support instruction encoding.
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2013-02-14 19:57:17 +00:00 |
HexagonSelectCCInfo.td
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Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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2012-02-18 12:03:15 +00:00 |
HexagonSelectionDAGInfo.cpp
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HexagonSelectionDAGInfo.h
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Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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2012-02-18 12:03:15 +00:00 |
HexagonSplitTFRCondSets.cpp
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Use the new script to sort the includes of every file under lib.
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2012-12-03 16:50:05 +00:00 |
HexagonSubtarget.cpp
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Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
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2013-03-22 18:41:34 +00:00 |
HexagonSubtarget.h
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Sort includes for all of the .h files under the 'lib' tree. These were
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2012-12-04 07:12:27 +00:00 |
HexagonTargetMachine.cpp
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Hexagon: Disable optimizations at O0.
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2013-03-27 11:14:24 +00:00 |
HexagonTargetMachine.h
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Switch TargetTransformInfo from an immutable analysis pass that requires
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2013-01-07 01:37:14 +00:00 |
HexagonTargetObjectFile.cpp
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Move all of the header files which are involved in modelling the LLVM IR
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2013-01-02 11:36:10 +00:00 |
HexagonTargetObjectFile.h
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Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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2012-02-18 12:03:15 +00:00 |
HexagonVarargsCallingConvention.h
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Move TargetData to DataLayout.
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2012-10-08 16:38:25 +00:00 |
HexagonVLIWPacketizer.cpp
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Hexagon: Replace switch-case in isDotNewInst with TSFlags.
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2013-03-28 19:44:04 +00:00 |
LLVMBuild.txt
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Hexagon: enable assembler output through the MC layer.
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2012-04-12 17:55:53 +00:00 |
Makefile
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Hexagon: enable assembler output through the MC layer.
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2012-04-12 17:55:53 +00:00 |