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InstPrinter
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MCTargetDesc
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TargetInfo
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AMDGPU.h
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AMDGPU.td
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AMDGPUAsmPrinter.cpp
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
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AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUIndirectAddressing.cpp
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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R600: Add support for i16 and i8 global stores
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2013-08-16 01:12:06 +00:00 |
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AMDGPUInstructions.td
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R600: Add support for i16 and i8 global stores
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2013-08-16 01:12:06 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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2013-08-16 01:11:55 +00:00 |
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AMDGPUISelLowering.cpp
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R600: Expand vector FFLOOR ops
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2013-08-16 23:51:29 +00:00 |
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AMDGPUISelLowering.h
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R600: Add support for global vector stores with elements less than 32-bits
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2013-08-16 01:12:11 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
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AMDGPUTargetMachine.h
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AMDGPUTargetTransformInfo.cpp
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AMDILBase.td
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AMDILCFGStructurizer.cpp
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AMDILInstrInfo.td
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AMDILIntrinsicInfo.cpp
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AMDILIntrinsicInfo.h
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AMDILIntrinsics.td
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AMDILISelLowering.cpp
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AMDILRegisterInfo.td
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CMakeLists.txt
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LLVMBuild.txt
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Makefile
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Processors.td
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R600ControlFlowFinalizer.cpp
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600Defines.h
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600InstrInfo.cpp
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600InstrInfo.h
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R600: Add IsExport bit to TableGen instruction definitions
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2013-08-16 01:11:51 +00:00 |
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R600Instructions.td
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R600: Add support for i16 and i8 global stores
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2013-08-16 01:12:06 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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R600: Expand vector float operations for both SI and R600
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2013-08-16 23:51:24 +00:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600: Enable folding of inline literals into REQ_SEQUENCE instructions
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2013-08-16 01:11:55 +00:00 |
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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SIAnnotateControlFlow.cpp
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SIDefines.h
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIFixSGPRCopies.cpp
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SIInsertWaits.cpp
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIInstrFormats.td
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIInstrInfo.cpp
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIInstrInfo.h
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R600/SI: Fix broken encoding of DS_WRITE_B32
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2013-08-16 16:19:24 +00:00 |
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SIInstrInfo.td
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Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"
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2013-08-16 01:18:43 +00:00 |
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SIInstructions.td
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R600/SI: Add pattern for xor of i1
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2013-08-16 16:19:31 +00:00 |
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SIIntrinsics.td
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SIISelLowering.cpp
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R600: Allocate memoperand in the MachienFunction so it doesn't leak.
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2013-08-16 14:48:09 +00:00 |
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SIISelLowering.h
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SILowerControlFlow.cpp
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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SIRegisterInfo.h
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SIRegisterInfo.td
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SISchedule.td
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SITypeRewriter.cpp
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