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https://github.com/c64scene-ar/llvm-6502.git
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86ca3cacc5
node as soon as we create it in SDISel. Previously we would lower it in legalize. The problem with this is that it only exposes the argument loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2 can hack on them. This causes us to miss some optimizations because datatype expansion also happens here. Exposing the loads early allows us to do optimizations on them. For example we now compile arg-cast.ll to: _foo: movl $2147483647, %eax andl 8(%esp), %eax ret where we previously produced: _foo: subl $12, %esp movsd 16(%esp), %xmm0 movsd %xmm0, (%esp) movl $2147483647, %eax andl 4(%esp), %eax addl $12, %esp ret It might also make sense to do this for ISD::CALL nodes, which have implicit stores on many targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47054 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| CallingConvLower.cpp | ||
| DAGCombiner.cpp | ||
| LegalizeDAG.cpp | ||
| LegalizeTypes.cpp | ||
| LegalizeTypes.h | ||
| LegalizeTypesExpand.cpp | ||
| LegalizeTypesPromote.cpp | ||
| LegalizeTypesScalarize.cpp | ||
| LegalizeTypesSplit.cpp | ||
| Makefile | ||
| ScheduleDAG.cpp | ||
| ScheduleDAGList.cpp | ||
| ScheduleDAGRRList.cpp | ||
| SelectionDAG.cpp | ||
| SelectionDAGISel.cpp | ||
| SelectionDAGPrinter.cpp | ||
| TargetLowering.cpp | ||