..
2011-03-09-CPSRSpill.ll
2011-03-17-AsmPrinterCrash.ll
2011-03-21-Unaligned-Frame-Index.ll
2011-04-21-CPSRBug.ll
2011-10-18-LdStOptBug.ll
2012-01-11-ComparisonDAGCrash.ll
2012-05-07-DAGCombineVectorExtract.ll
2012-05-07-MemcpyAlignBug.ll
2012-05-09-LOADgot-bug.ll
2012-05-22-LdStOptBug.ll
2012-06-06-FPToUI.ll
ARM64: add constraints to various FastISel operations
2014-04-15 13:59:53 +00:00
2012-07-11-InstrEmitterBug.ll
2013-01-13-ffast-fcmp.ll
2013-01-23-frem-crash.ll
2013-01-23-sext-crash.ll
2013-02-12-shufv8i8.ll
aapcs.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
aarch64-neon-2velem-high.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-2velem.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-3vdiff.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-aba-abd.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-across.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-add-pairwise.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-add-sub.ll
AArch64/ARM64: port some NEON tests to ARM64
2014-04-16 15:28:02 +00:00
aarch64-neon-copy.ll
AArch64/ARM64: spot a greater variety of concat_vector operations.
2014-04-18 09:31:27 +00:00
aarch64-neon-copyPhysReg-tuple.ll
AArch64/ARM64: improve spotting of EXT instructions from VECTOR_SHUFFLE.
2014-04-18 12:50:58 +00:00
aarch64-neon-mul-div.ll
AArch64/ARM64: port more AArch64 tests to ARM64.
2014-04-18 13:16:55 +00:00
aarch64-neon-simd-ldst-one.ll
AArch64/ARM64: add more NEON tests.
2014-04-18 14:54:53 +00:00
abi_align.ll
[ARM64] Rename FP to the UAL-compliant 'X29'.
2014-04-09 14:43:50 +00:00
abi-varargs.ll
abi.ll
[ARM64] Rename FP to the UAL-compliant 'X29'.
2014-04-09 14:43:50 +00:00
addp.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
addr-mode-folding.ll
Fix some doc and comment typos
2014-04-09 14:47:27 +00:00
addr-type-promotion.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
addrmode.ll
AdvSIMD-Scalar.ll
alloc-no-stack-realign.ll
alloca-frame-pointer-offset.ll
andCmpBrToTBZ.ll
anyregcc-crash.ll
anyregcc.ll
[Stackmaps] Update the stackmap format to use 64-bit relocations for the function address and properly align all entries.
2014-03-31 22:14:04 +00:00
arith-saturating.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
arith.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
arm64-dead-def-elimination-flag.ll
Add a flag to disable the ARM64DeadRegisterDefinitionsPass
2014-04-14 21:05:02 +00:00
atomic-128.ll
ARM64: switch to IR-based atomic operations.
2014-04-17 20:00:33 +00:00
atomic.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
basic-pic.ll
ARM64: use GOT for weak symbols & PIC.
2014-04-02 14:39:11 +00:00
big-imm-offsets.ll
big-stack.ll
bitfield-extract.ll
[CodeGenPrepare] Use APInt to check the value of the immediate in a and
2014-04-22 01:20:34 +00:00
blockaddress.ll
build-vector.ll
Fix some doc and comment typos
2014-04-09 14:47:27 +00:00
call-tailcalls.ll
cast-opt.ll
ccmp-heuristics.ll
ccmp.ll
clrsb.ll
Add ARM64 CLS patterns
2014-04-11 22:27:58 +00:00
coalesce-ext.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
code-model-large-abs.ll
collect-loh-garbage-crash.ll
collect-loh-str.ll
collect-loh.ll
ARM64: disable generation of .loh directives outside MachO.
2014-04-18 14:54:46 +00:00
compact-unwind-unhandled-cfi.S
complex-ret.ll
const-addr.ll
ARM64: use 32-bit moves for constants where possible.
2014-04-16 11:52:51 +00:00
convert-v2f64-v2i32.ll
convert-v2i32-v2f64.ll
copy-tuple.ll
crc32.ll
crypto.ll
ARM64: initial backend import
2014-03-29 10:18:08 +00:00
cse.ll
csel.ll
ARM64: use 32-bit moves for constants where possible.
2014-04-16 11:52:51 +00:00
cvt.ll
dagcombiner-convergence.ll
dagcombiner-indexed-load.ll
Add the ability to use GEPs for address sinking in CGP
2014-04-12 00:59:48 +00:00
dagcombiner-load-slicing.ll
dead-def-frame-index.ll
Fix for codegen bug that could cause illegal cmn instruction generation
2014-04-14 21:05:05 +00:00
dead-register-def-bug.ll
[ARM64] Teach the ARM64DeadRegisterDefinition pass to respect implicit-defs.
2014-04-03 20:51:08 +00:00
dup.ll
ARM64: implement cunning optimisation from AArch64
2014-04-18 09:31:20 +00:00
early-ifcvt.ll
elf-calls.ll
elf-constpool.ll
elf-globals.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
ext.ll
extend-int-to-fp.ll
extend.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
extern-weak.ll
ARM64: use GOT for weak symbols & PIC.
2014-04-02 14:39:11 +00:00
extload-knownzero.ll
extract_subvector.ll
extract.ll
fast-isel-addr-offset.ll
fast-isel-alloca.ll
[ARM64] Rename FP to the UAL-compliant 'X29'.
2014-04-09 14:43:50 +00:00
fast-isel-br.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
fast-isel-call.ll
[ARM64] Rename FP to the UAL-compliant 'X29'.
2014-04-09 14:43:50 +00:00
fast-isel-conversion.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
fast-isel-fcmp.ll
fast-isel-gv.ll
fast-isel-icmp.ll
fast-isel-indirectbr.ll
fast-isel-intrinsic.ll
fast-isel-materialize.ll
fast-isel-noconvert.ll
fast-isel-rem.ll
fast-isel-ret.ll
fast-isel-select.ll
fast-isel.ll
fastcc-tailcall.ll
fastisel-gep-promote-before-add.ll
fcmp-opt.ll
ARM64: explicitly ask for Apple NEON syntax so test passes on Linux
2014-04-16 09:13:44 +00:00
fcopysign.ll
fixed-point-scalar-cvt-dagcombine.ll
fmadd.ll
ARM64: fix fmsub patterns which assumed accum operand was first
2014-04-08 12:23:51 +00:00
fmax.ll
fminv.ll
ARM64: shuffle patterns around for fmin/fmax & add tests.
2014-03-31 15:46:30 +00:00
fmuladd.ll
fold-address.ll
fold-lsl.ll
fp128-folding.ll
fp128.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
fp-imm.ll
[ARM64] Fix materialization of an fp128 zero immediate. There currently
2014-03-31 00:02:10 +00:00
fp.ll
frame-index.ll
frameaddr.ll
[ARM64] Rename LR to the UAL-compliant 'X30'.
2014-04-09 14:43:59 +00:00
global-address.ll
hello.ll
[ARM64] Rename LR to the UAL-compliant 'X30'.
2014-04-09 14:43:59 +00:00
i16-subreg-extract.ll
icmp-opt.ll
illegal-float-ops.ll
ARM64: fix lowering of fp128 fptosi/fptoui
2014-04-02 14:39:07 +00:00
indexed-memory.ll
inline-asm-error-I.ll
inline-asm-error-J.ll
inline-asm-error-K.ll
inline-asm-error-L.ll
inline-asm-error-M.ll
inline-asm-error-N.ll
inline-asm-zero-reg-error.ll
inline-asm.ll
join-reserved.ll
jumptable.ll
ld1.ll
ARM64: add patterns for more lane-wise ld1/st1 operations.
2014-04-01 10:37:09 +00:00
ldp.ll
ldur.ll
ldxr-stxr.ll
ARM64: add acquire/release versions of the existing atomic intrinsics.
2014-04-17 20:00:24 +00:00
leaf-compact-unwind.ll
leaf.ll
lit.local.cfg
long-shift.ll
ARM64: use 32-bit moves for constants where possible.
2014-04-16 11:52:51 +00:00
memcpy-inline.ll
memset-inline.ll
memset-to-bzero.ll
misched-basic-A53.ll
[ARM64] Ports the Cortex-A53 Machine Model description from AArch64.
2014-04-18 21:22:04 +00:00
movi.ll
mul.ll
neg.ll
ARM64: add extra scalar neg pattern & tests.
2014-03-31 15:46:42 +00:00
neon-compare-instructions.ll
neon-v1i1-setcc.ll
DAGLegalize: add last-ditch type-legalization for VSELECT.
2014-04-04 14:49:30 +00:00
patchpoint.ll
ARM64: use 32-bit moves for constants where possible.
2014-04-16 11:52:51 +00:00
platform-reg.ll
popcnt.ll
prefetch.ll
promote-const.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
redzone.ll
register-offset-addressing.ll
register-pairing.ll
regress-f128csel-flags.ll
regress-interphase-shift.ll
Revert r191049/r191059 as it can produce wrong code (see PR17975).
2014-04-15 18:34:24 +00:00
return-vector.ll
returnaddr.ll
[ARM64] Rename LR to the UAL-compliant 'X30'.
2014-04-09 14:43:59 +00:00
rev.ll
ARM64: remove buggy REV16 pattern.
2014-04-14 12:59:52 +00:00
rounding.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
SafeDivRemIntrinsics-Opts.ll
Reapply r206732. This time without optimization of branches.
2014-04-21 12:01:33 +00:00
SafeDivRemIntrinsics.ll
Reapply r206732. This time without optimization of branches.
2014-04-21 12:01:33 +00:00
scaled_iv.ll
scvt.ll
shifted-sext.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
simd-scalar-to-vector.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
simplest-elf.ll
sincos.ll
ARM64: don't generate __sincos_stret calls unless on MachO
2014-04-03 07:06:13 +00:00
sitofp-combine-chains.ll
sli-sri-opt.ll
smaxv.ll
sminv.ll
spill-lr.ll
spill.ll
ARM64: specify triple so that Linux tests pass
2014-04-16 12:03:56 +00:00
st1.ll
ARM64: add patterns for more lane-wise ld1/st1 operations.
2014-04-01 10:37:09 +00:00
stack-no-frame.ll
stackmap.ll
[Stackmaps] Update the stackmap format to use 64-bit relocations for the function address and properly align all entries.
2014-03-31 22:14:04 +00:00
stacksave.ll
stp.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
strict-align.ll
stur.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
subsections.ll
ARM64: don't emit .subsections_via_symbols on ELF.
2014-04-18 14:54:41 +00:00
subvector-extend.ll
swizzle-tbl-i16-layout.ll
tbl.ll
this-return.ll
tls-darwin.ll
tls-dynamic-together.ll
tls-dynamics.ll
tls-execs.ll
trap.ll
trn.ll
trunc-store.ll
ARM64: [su]xtw use W regs as inputs, not X regs.
2014-04-17 20:47:31 +00:00
umaxv.ll
uminv.ll
umov.ll
unaligned_ldst.ll
uzp.ll
vaargs.ll
vabs.ll
ARM64: add i64 scalar pattern for @llvm.arm64.abs
2014-03-31 15:46:17 +00:00
vadd.ll
vaddlv.ll
vaddv.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
variadic-aapcs.ll
vbitwise.ll
vclz.ll
vcmp.ll
ARM64: add pattern for <1 x i64> custom not node.
2014-04-09 06:55:39 +00:00
vcnt.ll
vcombine.ll
vcvt_f32_su32.ll
ARM64: initial backend import
2014-03-29 10:18:08 +00:00
vcvt_f.ll
ARM64: convert fp16 narrowing ISel to pseudo-instruction
2014-04-02 14:38:54 +00:00
vcvt_n.ll
vcvt_su32_f32.ll
vcvt.ll
vcvtxd_f32_f64.ll
vecCmpBr.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
vecFold.ll
vector-ext.ll
vector-imm.ll
vector-insertion.ll
Make test/CodeGen/ARM64/vector-insertion.ll explicitly select neon syntax
2014-04-17 21:32:41 +00:00
vector-ldst.ll
vext.ll
vfloatintrinsics.ll
vhadd.ll
vhsub.ll
virtual_base.ll
vmax.ll
vminmaxnm.ll
vmovn.ll
vmul.ll
ARM64: scalarize v1i64 mul operation
2014-04-09 07:07:02 +00:00
volatile.ll
vpopcnt.ll
[ARM64] Fix "Cannot select" for vector ctpop
2014-04-17 01:01:37 +00:00
vqadd.ll
ARM64: add more scalar patterns for usqadd & suqadd.
2014-03-31 15:46:26 +00:00
vqsub.ll
vselect.ll
vsetcc_fp.ll
vshift.ll
ARM64: add extra NEG pattern.
2014-04-18 14:54:35 +00:00
vshr.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
vshuffle.ll
[ARM64] Set default CPU to generic instead of cyclone.
2014-04-15 19:08:46 +00:00
vsqrt.ll
ARM64: add more scalar patterns for reciprocal ops.
2014-03-31 15:46:22 +00:00
vsra.ll
ARM64: add extra patterns for scalar shifts
2014-03-31 15:46:46 +00:00
vsub.ll
weak-reference.ll
xaluo.ll
zero-cycle-regmov.ll
zero-cycle-zeroing.ll
zext.ll
zextload-unscaled.ll
zip.ll
