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llvm-6502/test/CodeGen/Hexagon/misaligned-access.ll
Jyotsna Verma cec50e6da2 Hexagon: Removed asserts regarding alignment and offset.
We are warning the user about the alignment, so we should not assert.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177103 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14 19:08:03 +00:00

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LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s
; Check that the mis-aligned load doesn't cause compiler to assert.
declare i32 @_hi(i64) #1
@temp1 = common global i32 0, align 4
define i32 @CSDRSEARCH_executeSearchManager() #0 {
entry:
%temp = alloca i32, align 4
%0 = load i32* @temp1, align 4
store i32 %0, i32* %temp, align 4
%1 = bitcast i32* %temp to i64*
%2 = load i64* %1, align 8
%call = call i32 @_hi(i64 %2)
ret i32 %call
}