llvm-6502/test/CodeGen/ARM
Chad Rosier 89a67a4d5e With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."
-verify-machineinstrs can be enabled for this test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-20 00:34:45 +00:00
..
2006-11-10-CycleInDAG.ll
2007-01-19-InfiniteLoop.ll
2007-03-07-CombinerCrash.ll
2007-03-13-InstrSched.ll
2007-03-21-JoinIntervalsCrash.ll
2007-03-27-RegScavengerAssert.ll
2007-03-30-RegScavengerAssert.ll
2007-04-02-RegScavengerAssert.ll
2007-04-03-PEIBug.ll
2007-04-03-UndefinedSymbol.ll
2007-04-30-CombinerCrash.ll
2007-05-03-BadPostIndexedLd.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
2007-05-07-tailmerge-1.ll Remove support for using "foo" as symbols instead of %"foo". This is ancient 2011-06-17 06:36:20 +00:00
2007-05-09-tailmerge-2.ll Remove support for using "foo" as symbols instead of %"foo". This is ancient 2011-06-17 06:36:20 +00:00
2007-05-14-InlineAsmCstCrash.ll
2007-05-14-RegScavengerAssert.ll
2007-05-22-tailmerge-3.ll Remove support for using "foo" as symbols instead of %"foo". This is ancient 2011-06-17 06:36:20 +00:00
2007-05-23-BadPreIndexedStore.ll
2007-08-15-ReuseBug.ll
2008-02-04-LocalRegAllocBug.ll
2008-02-29-RegAllocLocal.ll
2008-03-05-SxtInRegBug.ll
2008-03-07-RegScavengerAssert.ll
2008-04-04-ScavengerAssert.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
2008-04-10-ScavengerAssert.ll make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
2008-04-11-PHIofImpDef.ll
2008-05-19-LiveIntervalsBug.ll
2008-05-19-ScavengerAssert.ll
2008-07-17-Fdiv.ll
2008-07-24-CodeGenPrepCrash.ll
2008-08-07-AsmPrintBug.ll
2008-09-17-CoalescerBug.ll
2008-11-18-ScavengerAssert.ll
2009-02-16-SpillerBug.ll
2009-02-22-SoftenFloatVaArg.ll
2009-02-27-SpillerBug.ll
2009-03-07-SpillerBug.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
2009-03-09-AddrModeBug.ll
2009-04-06-AsmModifier.ll
2009-04-08-AggregateAddr.ll
2009-04-08-FloatUndef.ll
2009-04-08-FREM.ll
2009-04-09-RegScavengerAsm.ll
2009-05-05-DAGCombineBug.ll
2009-05-07-RegAllocLocal.ll
2009-05-11-CodePlacementCrash.ll
2009-05-18-InlineAsmMem.ll
2009-06-02-ISelCrash.ll
2009-06-04-MissingLiveIn.ll
2009-06-15-RegScavengerAssert.ll
2009-06-19-RegScavengerAssert.ll
2009-06-22-CoalescerBug.ll
2009-06-30-RegScavengerAssert2.ll
2009-06-30-RegScavengerAssert3.ll
2009-06-30-RegScavengerAssert4.ll
2009-06-30-RegScavengerAssert5.ll
2009-06-30-RegScavengerAssert.ll
2009-07-01-CommuteBug.ll
2009-07-09-asm-p-constraint.ll
2009-07-18-RewriterBug.ll
2009-07-22-ScavengerAssert.ll
2009-07-22-SchedulerAssert.ll
2009-07-29-VFP3Registers.ll
2009-08-02-RegScavengerAssert-Neon.ll
2009-08-04-RegScavengerAssert-2.ll
2009-08-04-RegScavengerAssert.ll
2009-08-15-RegScavenger-EarlyClobber.ll
2009-08-15-RegScavengerAssert.ll
2009-08-21-PostRAKill2.ll
2009-08-21-PostRAKill3.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
2009-08-21-PostRAKill.ll
2009-08-23-linkerprivate.ll
2009-08-26-ScalarToVector.ll
2009-08-27-ScalarToVector.ll
2009-08-29-ExtractEltf32.ll
2009-08-29-TooLongSplat.ll
2009-08-31-LSDA-Name.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
2009-08-31-TwoRegShuffle.ll
2009-09-09-AllOnes.ll
2009-09-09-fpcmp-ole.ll Correction. Use explicit target triple in the test. 2011-05-12 21:55:34 +00:00
2009-09-10-postdec.ll
2009-09-13-InvalidSubreg.ll
2009-09-13-InvalidSuperReg.ll
2009-09-20-LiveIntervalsBug.ll
2009-09-21-LiveVariablesBug.ll
2009-09-22-LiveVariablesBug.ll
2009-09-23-LiveVariablesBug.ll
2009-09-24-spill-align.ll
2009-09-27-CoalescerBug.ll
2009-09-28-LdStOptiBug.ll
2009-10-02-NEONSubregsBug.ll
2009-10-16-Scope.ll
2009-10-21-InvalidFNeg.ll
2009-10-27-double-align.ll
2009-10-30.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
2009-11-01-NeonMoves.ll Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler. 2011-07-15 18:46:47 +00:00
2009-11-02-NegativeLane.ll
2009-11-07-SubRegAsmPrinting.ll
2009-11-13-CoalescerCrash.ll
2009-11-13-ScavengerAssert2.ll
2009-11-13-ScavengerAssert.ll
2009-11-13-VRRewriterCrash.ll
2009-11-30-LiveVariablesBug.ll
2009-12-02-vtrn-undef.ll
2010-03-04-eabi-fp-spill.ll
2010-03-04-stm-undef-addr.ll
2010-03-18-ldm-rtrn.ll
2010-04-07-DbgValueOtherTargets.ll
2010-04-09-NeonSelect.ll
2010-04-13-v2f64SplitArg.ll
2010-04-14-SplitVector.ll
2010-04-15-ScavengerDebugValue.ll
2010-05-14-IllegalType.ll
2010-05-17-FastAllocCrash.ll
2010-05-18-LocalAllocCrash.ll
2010-05-18-PostIndexBug.ll
2010-05-19-Shuffles.ll
2010-05-20-NEONSpillCrash.ll
2010-05-21-BuildVector.ll
2010-06-11-vmovdrr-bitcast.ll
2010-06-21-LdStMultipleBug.ll
2010-06-21-nondarwin-tc.ll
2010-06-25-Thumb2ITInvalidIterator.ll
2010-06-29-PartialRedefFastAlloc.ll
2010-06-29-SubregImpDefs.ll
2010-07-26-GlobalMerge.ll
2010-08-04-EHCrash.ll
2010-08-04-StackVariable.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
2010-09-21-OptCmpBug.ll
2010-09-29-mc-asm-header-test.ll
2010-10-19-mc-elf-objheader.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
2010-10-25-ifcvt-ldm.ll
2010-11-15-SpillEarlyClobber.ll
2010-11-29-PrologueBug.ll
2010-11-30-reloc-movt.ll Print r_sym with the correct number of bits. 2011-08-04 14:48:27 +00:00
2010-12-07-PEIBug.ll
2010-12-08-tpsoft.ll
2010-12-15-elf-lcomm.ll print st_shndx with the correct number of bits. 2011-08-04 15:50:13 +00:00
2010-12-17-LocalStackSlotCrash.ll
2011-01-19-MergedGlobalDbg.ll
2011-02-04-AntidepMultidef.ll
2011-02-07-AntidepClobber.ll
2011-03-10-DAGCombineCrash.ll
2011-03-15-LdStMultipleBug.ll
2011-03-23-PeepholeBug.ll
2011-04-07-schediv.ll Fix a bunch of ARM tests to be register allocation independent. 2011-05-03 22:31:21 +00:00
2011-04-11-MachineLICMBug.ll Fix a bunch of ARM tests to be register allocation independent. 2011-05-03 22:31:21 +00:00
2011-04-12-AlignBug.ll
2011-04-12-FastRegAlloc.ll
2011-04-15-AndVFlagPeepholeBug.ll
2011-04-15-RegisterCmpPeephole.ll
2011-04-26-SchedTweak.ll
2011-04-27-IfCvtBug.ll
2011-05-04-MultipleLandingPadSuccs.ll SjLj EH could produce a machine basic block that legitimately has more than one 2011-05-04 22:54:05 +00:00
2011-06-09-TailCallByVal.ll A CCState was being created without setting whether it is in the Call or Prologue state, 2011-06-09 22:30:07 +00:00
2011-06-16-TailCallByVal.ll Update an insertion point iterator after replacing a return instruction with a 2011-06-17 02:16:43 +00:00
2011-06-29-MergeGlobalsAlign.ll In the ARM global merging pass, allow extraneous alignment specifiers. This pass 2011-06-29 22:24:25 +00:00
2011-07-10-GlobalMergeBug.ll Add a missing test for r134882. 2011-07-11 08:35:17 +00:00
2011-08-02-MergedGlobalDbg.ll Use byte offset, instead of element number, to access merged global. 2011-08-03 01:25:46 +00:00
2011-08-12-vmovqqqq-pseudo.ll With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads." 2011-08-20 00:34:45 +00:00
addrmode.ll
aliases.ll
align.ll
alloca.ll
argaddr.ll
arguments2.ll
arguments3.ll
arguments4.ll
arguments5.ll
arguments6.ll
arguments7.ll
arguments8.ll
arguments_f64_backfill.ll
arguments-nosplit-double.ll
arguments-nosplit-i64.ll
arguments.ll
arm-and-tst-peephole.ll Weekly fix of register allocation dependent unit tests. 2011-04-30 01:37:52 +00:00
arm-asm.ll
arm-frameaddr.ll
arm-modifier.ll Allow lr in the register options here. 2011-06-27 20:31:01 +00:00
arm-negative-stride.ll
arm-returnaddr.ll
armv4.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
atomic-cmp.ll
atomic-op.ll Fix the remaining atomic intrinsics to use the right register classes on Thumb2, 2011-05-27 23:54:00 +00:00
available_externally.ll
avoid-cpsr-rmw.ll Use regex to remove false dependencies on register allocation. 2011-08-19 23:10:31 +00:00
bfc.ll
bfi.ll PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff 2011-06-15 01:12:31 +00:00
bfx.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
bic.ll
bits.ll
bswap-inline-asm.ll
bx_fold.ll
call_nolink.ll
call-tc.ll Use ARMPseudoExpand for ARM tail calls. 2011-07-08 18:50:22 +00:00
call.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
carry.ll Don't depend on the optimization reverted in r134067. 2011-06-29 14:07:18 +00:00
clz.ll
code-placement.ll
compare-call.ll
constants.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
crash-greedy-v6.ll Fix a crash when building 177.mesa for armv6. 2011-07-18 18:47:13 +00:00
crash-greedy.ll
crash-O0.ll
crash.ll Transfer implicit operands in NEONMoveFixPass. 2011-07-29 00:27:35 +00:00
cse-libcalls.ll
ctors_dtors.ll
ctz.ll
debug-info-blocks.ll FastISel: avoid function calls between the materialization of the constant and its use. 2011-08-18 22:06:10 +00:00
debug-info-branch-folding.ll During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def. 2011-06-02 20:07:12 +00:00
debug-info-d16-reg.ll
debug-info-qreg.ll
debug-info-s16-reg.ll
debug-info-sreg2.ll Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly. 2011-08-19 23:28:12 +00:00
dg.exp
div.ll
dyn-stackalloc.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
eh-resume-darwin.ll On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume. 2011-05-29 19:50:32 +00:00
extloadi1.ll
fabss.ll Inflate register classes after coalescing. 2011-08-09 18:19:41 +00:00
fadds.ll
fast-isel-crash2.ll And fix the test in r132194. 2011-05-27 18:14:28 +00:00
fast-isel-crash.ll
fast-isel-pred.ll
fast-isel-redefinition.ll Fix run-line, again. :( 2011-04-29 21:33:03 +00:00
fast-isel-static.ll Be less aggressive about hinting in RAFast. 2011-06-13 03:26:46 +00:00
fast-isel.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
fcopysign.ll Fix a bunch of ARM tests to be register allocation independent. 2011-05-03 22:31:21 +00:00
fdivs.ll
fixunsdfdi.ll
flag-crash.ll
fmacs.ll
fmdrr-fmrrd.ll
fmscs.ll
fmuls.ll
fnegs.ll
fnmacs.ll
fnmscs.ll Make the test less likely to fail with minor changes. 2011-05-03 19:09:32 +00:00
fnmul.ll
fnmuls.ll
fold-const.ll Add a testcase for r135123. 2011-07-14 06:23:09 +00:00
formal.ll
fp16.ll
fp_convert.ll Inflate register classes after coalescing. 2011-08-09 18:19:41 +00:00
fp-arg-shuffle.ll
fp.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
fparith.ll
fpcmp_ueq.ll
fpcmp-opt.ll
fpcmp.ll
fpconsts.ll
fpconv.ll
fpmem.ll
fpow.ll
fpowi.ll
fptoint.ll
fsubs.ll
global-merge.ll
globals.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
hardfloat_neon.ll
hello.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis.ll
iabs.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
ifcvt1.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
ifcvt2.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
ifcvt3.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
ifcvt4.ll Remove underscore that's breaking linux buildbots. 2011-08-03 23:13:01 +00:00
ifcvt5.ll
ifcvt6.ll
ifcvt7.ll
ifcvt8.ll
ifcvt9.ll
ifcvt10.ll
ifcvt11.ll
illegal-vector-bitcast.ll
imm.ll
indirectbr.ll Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics. 2011-08-03 22:34:43 +00:00
inlineasm2.ll
inlineasm3.ll Add support for the 'Q' constraint. 2011-07-29 21:18:58 +00:00
inlineasm4.ll Add support for the R and Q constraints. 2011-08-10 16:26:42 +00:00
inlineasm-imm-arm.ll
inlineasm.ll
insn-sched1.ll
int-to-fp.ll
intrinsics.ll Add a few ARM coprocessor intrinsics. Testcases included 2011-05-03 17:29:22 +00:00
ispositive.ll
jumptable-label.ll Testcase for previous commit. 2011-06-15 21:18:51 +00:00
large-stack.ll
ldm.ll
ldr_ext.ll
ldr_frame.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
ldr_post.ll
ldr_pre.ll
ldr.ll
ldrd.ll Weekly fix of register allocation dependent unit tests. 2011-04-30 01:37:52 +00:00
ldst-f32-2-i32.ll Fix a bunch of ARM tests to be register allocation independent. 2011-05-03 22:31:21 +00:00
ldstrexd.ll Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs 2011-05-28 04:07:29 +00:00
load-global.ll
load.ll
long_shift.ll
long-setcc.ll
long.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
lsr-code-insertion.ll Weekly fix of register allocation dependent unit tests. 2011-04-30 01:37:52 +00:00
lsr-on-unrolled-loops.ll
lsr-scale-addr-mode.ll
lsr-unfolded-offset.ll Be more aggressive about following hints. 2011-07-08 20:46:18 +00:00
machine-cse-cmp.ll
machine-licm.ll
mem.ll
memcpy-inline.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
memfunc.ll rip out a ton of intrinsic modernization logic from AutoUpgrade.cpp, which is 2011-06-18 06:05:24 +00:00
mls.ll
movt-movw-global.ll Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789 2011-05-27 20:11:27 +00:00
movt.ll
mul_const.ll
mul.ll
mulhi.ll
mult-alt-generic-arm.ll
mvn.ll
neon_arith1.ll
neon_div.ll
neon_ld1.ll
neon_ld2.ll
neon_minmax.ll
neon_shift.ll
pack.ll
peephole-bitcast.ll
phi.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
pr3502.ll
prefetch.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
private.ll make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
reg_sequence.ll Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler. 2011-07-15 18:46:47 +00:00
ret0.ll
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_f32_arg2.ll
ret_f32_arg5.ll
ret_f64_arg2.ll
ret_f64_arg_reg_split.ll
ret_f64_arg_split.ll
ret_f64_arg_stack.ll
ret_i64_arg2.ll
ret_i64_arg3.ll
ret_i64_arg_split.ll
ret_i128_arg2.ll
ret_void.ll
rev.ll Teach dag combine to match halfword byteswap patterns. 2011-06-21 06:01:08 +00:00
sbfx.ll
section.ll FileCheck-ize and simplify RUN lines. 2011-07-02 20:43:11 +00:00
select_xform.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
select-imm.ll Improve codegen for select's: 2011-07-13 00:42:17 +00:00
select.ll Thumb assembly parsing and encoding for ADR. 2011-08-17 20:37:40 +00:00
shifter_operand.ll
shuffle.ll
smul.ll
spill-q.ll
stack-frame.ll
stm.ll Fix a bunch of ARM tests to be register allocation independent. 2011-05-03 22:31:21 +00:00
str_post.ll
str_pre-2.ll ARM push of a single register encodes as pre-indexed STR. 2011-08-11 18:07:11 +00:00
str_pre.ll
str_trunc.ll
sub.ll Simplify printing of ARM shifted immediates. 2011-07-11 16:48:36 +00:00
sxt_rot.ll FileCheck'ize test. 2011-07-26 20:49:44 +00:00
t2-imm.ll
tail-opts.ll
thread_pointer.ll
thumb1-varalloc.ll
tls1.ll
tls2.ll
tls3.ll
trap.ll
trunc_ldr.ll
truncstore-dag-combine.ll Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 2011-07-07 03:55:05 +00:00
tst_teq.ll
uint64tof64.ll
umulo-32.ll
unaligned_load_store.ll Weekly fix of register allocation dependent unit tests. 2011-04-30 01:37:52 +00:00
undef-sext.ll
unord.ll
uxt_rot.ll manually upgrade a bunch of tests to modern syntax, and remove some that 2011-06-17 03:14:27 +00:00
uxtb.ll
va_arg.ll
vaba.ll
vabd.ll
vabs.ll
vadd.ll
vargs_align.ll Remove support for using "foo" as symbols instead of %"foo". This is ancient 2011-06-17 06:36:20 +00:00
vargs.ll
vbits.ll
vbsl-constant.ll
vbsl.ll
vceq.ll
vcge.ll
vcgt.ll
vcnt.ll
vcombine.ll
vcvt_combine.ll The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) 2011-06-24 19:23:04 +00:00
vcvt.ll
vdiv_combine.ll The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) 2011-06-24 19:23:04 +00:00
vdup.ll
vector-DAGCombine.ll
vext.ll
vfcmp.ll
vfp.ll
vget_lane.ll
vhadd.ll
vhsub.ll
vicmp.ll
vld1.ll
vld2.ll
vld3.ll
vld4.ll
vlddup.ll
vldlane.ll Teach LiveInterval::isZeroLength about null SlotIndexes. 2011-05-16 23:50:05 +00:00
vminmax.ll
vmla.ll
vmls.ll
vmov.ll
vmul.ll Typos. 2011-06-16 01:24:24 +00:00
vneg.ll
vpadal.ll
vpadd.ll Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add. 2011-06-14 23:48:48 +00:00
vpminmax.ll
vqadd.ll
vqdmul.ll make the asmparser reject function and type redefinitions. 'Merging' hasn't been 2011-06-17 07:06:44 +00:00
vqshl.ll
vqshrn.ll
vqsub.ll
vrec.ll
vrev.ll Handle perfect shuffle case that generates a vrev for vectors of floats. 2011-05-18 21:44:54 +00:00
vshift.ll
vshiftins.ll
vshl.ll
vshll.ll
vshrn.ll
vsra.ll
vst1.ll
vst2.ll
vst3.ll
vst4.ll
vstlane.ll Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain). 2011-05-11 14:40:50 +00:00
vsub.ll
vtbl.ll
vtrn.ll
vuzp.ll
vzip.ll
weak2.ll
weak.ll