Rafael Espindola 45968c54e9 Fix a bit of confusion about .set and produce more readable assembly. ... Every target we support has support for assembly that looks like a = b - c .long a What is special about MachO is that the above combination suppresses the production of a relocation. With this change we avoid producing the intermediary labels when they don't add any value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220256 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-21 01:17:30 +00:00
..
InstPrinter	R600/SI: Change how DS offsets are printed	2014-10-10 22:16:07 +00:00
MCTargetDesc	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00
TargetInfo
AMDGPU.h	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
AMDGPU.td	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
AMDGPUAsmPrinter.cpp	R600: Align functions to 256 bytes	2014-10-03 19:02:02 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	R600: Remove dead code	2014-10-07 21:29:56 +00:00
AMDGPUInstrInfo.h	R600: Remove dead code	2014-10-07 21:29:56 +00:00
AMDGPUInstrInfo.td
AMDGPUInstructions.td	R600/SI: Add global atomicrmw xchg	2014-10-17 23:33:03 +00:00
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp	R600/SI: Remove SI_BUFFER_RSRC pseudo	2014-10-17 17:42:56 +00:00
AMDGPUISelLowering.cpp	R600: Fix nonsensical implementation of computeKnownBits for BFE	2014-10-16 20:07:40 +00:00
AMDGPUISelLowering.h	R600: Remove dead function	2014-10-16 00:08:09 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h	Reapply "R600: Add new intrinsic to read work dimensions"	2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp	Remove unnecessary copying or replace it with moves in a bunch of places.	2014-10-04 16:55:56 +00:00
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
AMDGPUSubtarget.h	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
AMDGPUTargetMachine.cpp	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILCFGStructurizer.cpp
CaymanInstructions.td
CMakeLists.txt	R600/SI: Add load / store machine optimizer pass.	2014-10-10 22:01:59 +00:00
EvergreenInstructions.td
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp	Remove unnecessary copying or replace it with moves in a bunch of places.	2014-10-04 16:55:56 +00:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp	Remove unused argument to CreateTargetScheduleState and change	2014-10-09 01:59:35 +00:00
R600InstrInfo.h	Remove unused argument to CreateTargetScheduleState and change	2014-10-09 01:59:35 +00:00
R600Instructions.td	R600: FMA is VecALU only instruction	2014-10-14 18:52:04 +00:00
R600Intrinsics.td
R600ISelLowering.cpp	Reapply "R600: Add new intrinsic to read work dimensions"	2014-10-14 20:05:26 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp	Eliminate some deep std::vector copies. NFC.	2014-10-03 18:33:16 +00:00
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h	R600/SI: Fix printing of clamp and omod	2014-09-30 19:49:48 +00:00
SIFixSGPRCopies.cpp	R600/SI: Simplify debug printing	2014-10-17 00:36:20 +00:00
SIFixSGPRLiveRanges.cpp	R600/SI: Fix the FixSGPRLiveRanges pass	2014-09-24 01:33:24 +00:00
SIInsertWaits.cpp	Fix include order	2014-09-29 15:53:15 +00:00
SIInstrFormats.td	R600/SI: Refactor VOP1 instruction defs	2014-10-07 23:51:34 +00:00
SIInstrInfo.cpp	Fix typo	2014-10-17 18:02:31 +00:00
SIInstrInfo.h	R600/SI: Fix general commuting breaking src mods	2014-10-17 18:00:43 +00:00
SIInstrInfo.td	R600/SI: Change how DS offsets are printed	2014-10-10 22:16:07 +00:00
SIInstructions.td	R600/SI: Add global atomicrmw xchg	2014-10-17 23:33:03 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Remove SI_BUFFER_RSRC pseudo	2014-10-17 17:42:56 +00:00
SIISelLowering.h	R600/SI: Legalize CopyToReg during instruction selection	2014-10-09 19:06:00 +00:00
SILoadStoreOptimizer.cpp	R600/SI: Match read2/write2 stride 64 versions	2014-10-10 22:12:32 +00:00
SILowerControlFlow.cpp
SILowerI1Copies.cpp	Fix typo	2014-10-09 19:15:15 +00:00
SIMachineFunctionInfo.cpp	R600/SI: Implement VGPR register spilling for compute at -O0 v3	2014-09-24 01:33:17 +00:00
SIMachineFunctionInfo.h	R600/SI: Implement VGPR register spilling for compute at -O0 v3	2014-09-24 01:33:17 +00:00
SIRegisterInfo.cpp	R600/SI: Add new helper isSGPRClassID	2014-09-24 02:17:12 +00:00
SIRegisterInfo.h	R600/SI: Add new helper isSGPRClassID	2014-09-24 02:17:12 +00:00
SIRegisterInfo.td	R600/SI: Disable copying of SCC	2014-10-10 17:44:47 +00:00
SISchedule.td
SIShrinkInstructions.cpp	R600/SI: Also check for FPImm literal constants	2014-10-17 18:00:50 +00:00
SITypeRewriter.cpp