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AsmParser
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Minor cleanup to all the switches after MatchInstructionImpl in all the AsmParsers.
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2015-01-03 08:16:34 +00:00 |
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InstPrinter
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R600/SI: Fix f64 inline immediates
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2014-12-17 21:04:08 +00:00 |
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MCTargetDesc
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Revert r225048: It broke ObjC on AArch64.
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2015-01-06 00:54:32 +00:00 |
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TargetInfo
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AMDGPU.h
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R600/SI: Add SIFoldOperands pass
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2014-11-21 22:06:37 +00:00 |
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AMDGPU.td
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAsmPrinter.cpp
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Silencing a 32-bit implicit conversion warning in MSVC; NFC.
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2014-12-03 14:39:58 +00:00 |
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AMDGPUAsmPrinter.h
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R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
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2014-12-02 22:00:07 +00:00 |
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AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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R600/SI: fmin/fmax_legacy are not associative
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2014-12-12 02:30:33 +00:00 |
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AMDGPUInstructions.td
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R600/SI: Make more unordered comparisons legal
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2014-12-11 22:15:39 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
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R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime
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2014-12-02 17:05:41 +00:00 |
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AMDGPUISelLowering.cpp
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R600: Remove outdated comment
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2014-12-19 23:29:13 +00:00 |
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AMDGPUISelLowering.h
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R600: Fix min/max matching problems with unordered compares
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2014-12-12 02:30:37 +00:00 |
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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R600/SI: Fix f64 inline immediates
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2014-12-17 21:04:08 +00:00 |
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AMDGPUMCInstLower.h
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
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R600/SI: Enable inline assembly
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2014-12-03 04:08:00 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
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2014-12-02 22:00:07 +00:00 |
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AMDGPUSubtarget.h
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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AMDGPUTargetMachine.cpp
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[CodeGen] Add print and verify pass after each MachineFunctionPass by default
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2014-12-11 21:26:47 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPUTargetTransformInfo.cpp
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
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2014-12-02 22:00:07 +00:00 |
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CaymanInstructions.td
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CIInstructions.td
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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CMakeLists.txt
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R600/SI: Add SIFoldOperands pass
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2014-11-21 22:06:37 +00:00 |
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EvergreenInstructions.td
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LLVMBuild.txt
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Makefile
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Processors.td
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
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R600InstrInfo.h
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R600Instructions.td
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R600/SI: Use unordered not equal instructions
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2014-12-11 22:15:35 +00:00 |
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R600Intrinsics.td
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R600ISelLowering.cpp
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R600: Fix min/max matching problems with unordered compares
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2014-12-12 02:30:37 +00:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
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R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDefines.h
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R600/SI: Move more information into SIProgramInfo struct
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2014-12-02 21:28:53 +00:00 |
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SIFixSGPRCopies.cpp
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R600/SI: Fix SIFixSGPRCopies for copies to physical registers
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2014-12-03 05:22:39 +00:00 |
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SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
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R600/SI: Add SIFoldOperands pass
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2014-11-21 22:06:37 +00:00 |
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SIInsertWaits.cpp
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R600/SI: Disable VMEM and SMEM clauses by breaking them with S_NOP
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2014-12-07 17:17:43 +00:00 |
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SIInstrFormats.td
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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SIInstrInfo.cpp
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R600/SI: isLegalOperand() shouldn't check constant bus for SALU instructions
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2014-12-19 22:15:37 +00:00 |
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SIInstrInfo.h
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R600/SI: Set 20-bit immediate byte offset for SMRD on VI
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2014-12-07 17:17:38 +00:00 |
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SIInstrInfo.td
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R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
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2014-12-19 22:15:30 +00:00 |
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SIInstructions.td
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R600/SI: Fix f64 inline immediates
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2014-12-17 21:04:08 +00:00 |
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SIIntrinsics.td
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SIISelLowering.cpp
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Enable (sext x) == C --> x == (trunc C) combine
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2014-12-21 16:48:42 +00:00 |
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SIISelLowering.h
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SILoadStoreOptimizer.cpp
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R600/SI: Fix live range error hidden by SIFoldOperands
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2014-12-03 05:22:29 +00:00 |
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SILowerControlFlow.cpp
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Removing a variable that is initialized but never read. The original author has been alerted to the warning, in case this variable is meant to be used. Fixes -Werror builds in the meantime.
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2014-11-24 14:03:16 +00:00 |
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SILowerI1Copies.cpp
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R600/SI: Remove i1 pseudo VALU ops
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2014-12-03 05:22:35 +00:00 |
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
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2014-12-19 22:15:30 +00:00 |
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SIRegisterInfo.h
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SIRegisterInfo.td
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R600/SI: Make sure non-inline constants aren't folded into mubuf soffset operand
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2014-12-19 22:15:30 +00:00 |
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SISchedule.td
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SIShrinkInstructions.cpp
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R600/SI: Move continue after checking s_mov_b32.
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2014-12-08 19:55:43 +00:00 |
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SITypeRewriter.cpp
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VIInstrFormats.td
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R600/SI: Add VI instructions
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2014-12-07 12:18:57 +00:00 |
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VIInstructions.td
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R600/SI: Set 20-bit immediate byte offset for SMRD on VI
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2014-12-07 17:17:38 +00:00 |
