Matt Arsenault afd1747bbc R600: Add comment describing problems with LowerConstantInitializer ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209333 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-21 22:59:17 +00:00
..
InstPrinter	R600/SI: Prettier display of input modifiers	2014-05-10 19:18:33 +00:00
MCTargetDesc
TargetInfo
AMDGPU.h
AMDGPU.td	R600/SI: Add a PredicateControl class for managing TableGen predicates	2014-05-16 20:56:45 +00:00
AMDGPUAsmPrinter.cpp
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUConvertToISA.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
AMDGPUInstructions.td
AMDGPUIntrinsics.td	R600: Add mul24 intrinsics	2014-05-12 17:49:57 +00:00
AMDGPUISelDAGToDAG.cpp	R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0	2014-05-15 14:41:54 +00:00
AMDGPUISelLowering.cpp	R600: Add comment describing problems with LowerConstantInitializer	2014-05-21 22:59:17 +00:00
AMDGPUISelLowering.h	Remove unused method declaration	2014-05-19 22:55:35 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp	Resolving MSVC warnings about switch statements with a default label, but no case labels. No functional changes intended.	2014-05-19 14:29:04 +00:00
AMDGPUMCInstLower.h	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
AMDGPURegisterInfo.cpp	Use range for	2014-05-15 21:44:05 +00:00
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
AMDGPUSubtarget.h
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDILBase.td
AMDILCFGStructurizer.cpp
AMDILInstrInfo.td
AMDILIntrinsicInfo.cpp
AMDILIntrinsicInfo.h
AMDILIntrinsics.td	R600: Add mul24 intrinsics	2014-05-12 17:49:57 +00:00
AMDILISelLowering.cpp	Use range for	2014-05-15 21:44:05 +00:00
AMDILRegisterInfo.td
CaymanInstructions.td
CMakeLists.txt
EvergreenInstructions.td
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td
R600Intrinsics.td
R600ISelLowering.cpp	Use cast<> for unchecked use	2014-05-12 20:42:57 +00:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
SIDefines.h
SIFixSGPRCopies.cpp	R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies	2014-05-15 14:41:55 +00:00
SIInsertWaits.cpp
SIInstrFormats.td	R600/SI: Add a PredicateControl class for managing TableGen predicates	2014-05-16 20:56:45 +00:00
SIInstrInfo.cpp	R600/SI: Fix a bug with handling of INSERT_SUBREG in SIFixSGPRCopies	2014-05-15 14:41:55 +00:00
SIInstrInfo.h	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
SIInstrInfo.td	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
SIInstructions.td	R600/SI: Refactor the VOP3_32 tablegen class	2014-05-16 20:56:47 +00:00
SIIntrinsics.td
SIISelLowering.cpp	R600/SI: Promote f32 SELECT to i32	2014-05-16 20:56:41 +00:00
SIISelLowering.h
SILowerControlFlow.cpp
SILowerI1Copies.cpp	R600/SI: Use VALU instructions for i1 ops	2014-05-15 14:41:50 +00:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIRegisterInfo.cpp	Use range for	2014-05-12 19:23:21 +00:00
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SITypeRewriter.cpp