Misha Brukman a51245036e * Removed PreSelection pass because that is now done in the JIT ... * Removed instruction scheduling as it is too slow to run in a JIT environment * Removed other passes because they aren't necessary and can slow JIT down git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6652 91177308-0d34-0410-b5e6-96231b3b80d8		2003-06-06 07:11:16 +00:00
..
InstrSched	Remove usage of noncopyable classes to clean up doxygen output.	2003-06-02 22:45:07 +00:00
InstrSelection	I have finally seen the light. The code to change the opcode must live higher in	2003-06-04 04:54:06 +00:00
LiveVar	Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()	2003-05-27 00:06:48 +00:00
ModuloScheduling	compiled with the new SchedGraphCommon	2003-06-02 17:48:56 +00:00
RegAlloc	Minor changes.	2003-05-31 07:41:54 +00:00
.cvsignore	Since there is now another derived .inc file, ignore them all.	2003-05-29 20:15:27 +00:00
EmitBytecodeToAssembly.cpp
MachineCodeForInstruction.h	Move annotation to support library	2003-01-14 21:29:58 +00:00
MachineFunctionInfo.h	State for frame and constant pool information pulled out of MachineFunction	2002-12-28 20:07:33 +00:00
MachineInstrAnnot.h	Renamed a variable.	2003-05-31 07:43:41 +00:00
Makefile	Use the new -o tablegen option	2003-06-03 05:06:33 +00:00
MappingInfo.cpp	lib/CodeGen/Mapping/MappingInfo.cpp:	2003-06-04 22:07:12 +00:00
MappingInfo.h	Add file comment. Include <vector> and <string>. Update include guards	2003-06-04 22:02:47 +00:00
SparcV9_F2.td	Moved predict and annul fields to the end of each individual instruction	2003-06-05 23:33:15 +00:00
SparcV9_F3.td	Added missing directive to store the instruction name.	2003-06-05 23:35:11 +00:00
SparcV9_F4.td	Added the 4.7 instruction class and all the FMOVcc instructions in them.	2003-06-04 04:48:31 +00:00
SparcV9_Reg.td	* Broke up SparcV9.td into separate files as it was getting unmanageable	2003-05-29 03:31:43 +00:00
SparcV9.burg.in	Add support for compiling varargs functions.	2003-05-25 15:59:47 +00:00
SparcV9.td	The SUB*i instructions belong to a different class than their SUB*r brethren.	2003-06-06 03:34:47 +00:00
SparcV9AsmPrinter.cpp	Reverting previous beautification changes.	2003-05-31 07:27:17 +00:00
SparcV9CodeEmitter.cpp	Fixed a bunch of test cases in test/Regression/Jello which could not get the	2003-06-06 04:41:22 +00:00
SparcV9CodeEmitter.h	Added lazy function resolution to the JIT.	2003-06-05 20:52:06 +00:00
SparcV9Instr.def	Added MOVR (move int reg on register condition), aka comparison with zero.	2003-06-02 21:16:54 +00:00
SparcV9InstrInfo.cpp	Convert load/store opcodes from register to immediate forms, if necessary.	2003-06-03 03:20:57 +00:00
SparcV9InstrSelection.cpp	* Convert load/store opcodes from register to immediate forms.	2003-06-03 03:21:58 +00:00
SparcV9InstrSelectionSupport.h	Added opcode conversion for conditional move of integers.	2003-06-03 03:23:35 +00:00
SparcV9Internals.h	Extensive changes to the way code generation occurs for function	2003-05-31 07:32:01 +00:00
SparcV9PeepholeOpts.cpp	Cleaned up code layout; no functional changes.	2003-05-23 19:20:57 +00:00
SparcV9PreSelection.cpp	Minor tuning -- avoid a non-inlinable function call on every operand.	2003-06-05 21:12:56 +00:00
SparcV9PrologEpilogInserter.cpp	Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.	2003-05-27 22:35:43 +00:00
SparcV9RegClassInfo.cpp	Fixed `volatile' typo.	2003-05-21 19:34:28 +00:00
SparcV9RegClassInfo.h	Added special register class containing (for now) %fsr.	2003-05-27 00:02:22 +00:00
SparcV9RegInfo.cpp	Add map info for arguments to call (copies)	2003-06-01 02:48:23 +00:00
SparcV9SchedInfo.cpp	Added entries for each of the instructions with annotations ('r' or 'i').	2003-05-27 22:33:39 +00:00
SparcV9StackSlots.cpp	Rename MachineInstrInfo -> TargetInstrInfo	2003-01-14 22:00:31 +00:00
SparcV9TargetMachine.cpp	* Removed PreSelection pass because that is now done in the JIT	2003-06-06 07:11:16 +00:00