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llvm-6502/lib/Target/SparcV8
History
Jim Laskey e0bce71c42 Had expand logic backward. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 01:47:43 +00:00
..
.cvsignore
DelaySlotFiller.cpp
FPMover.cpp add fneg/fabs support for doubles 2005-12-19 00:50:12 +00:00
Makefile
README.txt not a good idea 2005-12-23 07:37:47 +00:00
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp The sun assembler only supports .xword in V9 mode. 2005-12-18 23:36:45 +00:00
SparcV8InstrFormats.td Push ops list, asm string, and pattern all the way up to InstV8. Move the 2005-12-18 08:21:00 +00:00
SparcV8InstrInfo.cpp Tighten up some checks 2005-12-18 06:40:34 +00:00
SparcV8InstrInfo.h
SparcV8InstrInfo.td Added field noResults to Instruction. 2005-12-26 09:11:45 +00:00
SparcV8ISelDAGToDAG.cpp Had expand logic backward. 2006-01-05 01:47:43 +00:00
SparcV8ISelSimple.cpp Elimiante SP and FP, which weren't members of the IntRegs register class 2005-12-19 00:06:52 +00:00
SparcV8RegisterInfo.cpp * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 2005-12-23 22:14:32 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcV8TargetMachine.cpp Run lower-switch after lower-invoke. 2005-12-20 08:00:11 +00:00
SparcV8TargetMachine.h

README.txt 

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.