Evan Cheng b077b842b6 * Added lowering hook for external weak global address. It inserts a load ... for Darwin. * Added lowering hook for ISD::RET. It inserts CopyToRegs for the return value (or store / fld / copy to ST(0) for floating point value). This eliminate the need to write C++ code to handle RET with variable number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-21 02:39:21 +00:00
..
Alpha	fix FP selects	2005-12-12 20:30:09 +00:00
CBackend	do not allow '.' in symbol names	2005-11-10 21:39:29 +00:00
IA64	Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted.	2005-12-05 02:34:29 +00:00
PowerPC	Flip the meaning of FPContractions to reflect Requires<[]> change.	2005-12-20 20:08:53 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	Run lower-switch after lower-invoke.	2005-12-20 08:00:11 +00:00
SparcV8	Run lower-switch after lower-invoke.	2005-12-20 08:00:11 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	* Added lowering hook for external weak global address. It inserts a load	2005-12-21 02:39:21 +00:00
Makefile	DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now	2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp	Rename MRegisterDesc -> TargetRegisterDesc for consistency	2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp	Preparation of supporting scheduling info. Need to find info based on selected	2005-10-25 15:15:28 +00:00
Target.td	Added support to specify predicates.	2005-12-14 22:02:59 +00:00
TargetData.cpp	Update to use the new MathExtras.h support for log2 computation.	2005-08-02 19:26:06 +00:00
TargetFrameInfo.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00
TargetInstrInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetMachine.cpp	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp	Convert tabs to spaces	2005-04-22 17:54:37 +00:00
TargetSchedule.td	add a marker	2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td	Added X86 readport patterns.	2005-12-20 07:38:38 +00:00
TargetSubtarget.cpp	Eliminate all remaining tabs and trailing spaces.	2005-07-27 06:12:32 +00:00