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llvm-6502/test/CodeGen/NVPTX
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Justin Holewinski 2941802bad [NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 20:23:49 +00:00
..
access-non-generic.ll
Canonicalize addrspacecast ConstExpr between different pointer types
2014-06-15 21:40:57 +00:00
add-128bit.ll
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addrspacecast-gvar.ll
[NVPTX] Add support for addrspacecast in global variable initializers, including emitting generic() when casting to address space 0.
2014-04-09 15:39:11 +00:00
addrspacecast.ll
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aggr-param.ll
[NVPTX] Fix emitting aggregate parameters
2014-01-28 18:35:29 +00:00
annotations.ll
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arg-lowering.ll
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arithmetic-fp-sm20.ll
[NVPTX] Improve handling of FP fusion
2014-07-17 18:10:09 +00:00
arithmetic-int.ll
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atomics.ll
Add some tests for NVPTX lowering of cmpxchg
2014-07-21 22:54:44 +00:00
bfe.ll
[NVPTX] Add isel patterns for bit-field extract (bfe)
2014-06-27 18:35:27 +00:00
bug17709.ll
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call-with-alloca-buffer.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
callchain.ll
[NVPTX] Fix handling of indirect calls
2013-11-15 12:30:04 +00:00
calling-conv.ll
[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.
2013-03-30 14:29:30 +00:00
compare-int.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
constant-vectors.ll
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convert-fp.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
convert-int-sm20.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
ctlz.ll
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ctpop.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
cttz.ll
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div-ri.ll
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envreg.ll
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fast-math.ll
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fma-disable.ll
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fma.ll
[NVPTX] Improve handling of FP fusion
2014-07-17 18:10:09 +00:00
fp16.ll
NVPTX: support direct f16 <-> f64 conversions via intrinsics.
2014-07-18 08:30:10 +00:00
fp-contract.ll
[NVPTX] Improve handling of FP fusion
2014-07-17 18:10:09 +00:00
fp-literals.ll
[NVPTX] Improve handling of FP fusion
2014-07-17 18:10:09 +00:00
generic-to-nvvm.ll
[NVPTX] Add support for selecting CUDA vs OCL mode based on triple
2013-06-21 18:51:49 +00:00
global-ordering.ll
[NVPTX] Order global variables in def-use order before emiting them in the final assembly
2012-11-16 21:03:51 +00:00
gvar-init.ll
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half.ll
NVPTX: support fpext/fptrunc to and from f16.
2014-07-18 13:01:43 +00:00
i1-global.ll
[NVPTX] Add support for selecting CUDA vs OCL mode based on triple
2013-06-21 18:51:49 +00:00
i1-int-to-fp.ll
[NVPTX] Add missing patterns for i1 [s,u]int_to_fp
2013-08-06 14:13:34 +00:00
i1-param.ll
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i8-param.ll
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imad.ll
[NVPTX] Implement fma and imad contraction as target DAGCombiner patterns
2014-06-27 18:35:37 +00:00
implicit-def.ll
[NVPTX] Improve handling of FP fusion
2014-07-17 18:10:09 +00:00
inline-asm.ll
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intrin-nocapture.ll
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intrinsic-old.ll
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intrinsics.ll
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isspacep.ll
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ld-addrspace.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
ld-generic.ll
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ldparam-v4.ll
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ldu-i8.ll
[NVPTX] Fix handling of ldg/ldu intrinsics.
2014-06-27 18:35:51 +00:00
ldu-ldg.ll
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ldu-reg-plus-offset.ll
[NVPTX] Fix handling of ldg/ldu intrinsics.
2014-06-27 18:35:51 +00:00
lit.local.cfg
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load-sext-i1.ll
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local-stack-frame.ll
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managed.ll
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misaligned-vector-ldst.ll
[NVPTX] Honor alignment on vector loads/stores
2014-07-16 19:45:35 +00:00
module-inline-asm.ll
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mulwide.ll
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
2014-07-23 20:23:49 +00:00
noduplicate-syncthreads.ll
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nvvm-reflect.ll
[NVPTX] Add reflect intrinsic (better than matching by function name)
2014-06-27 18:36:11 +00:00
param-align.ll
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pr13291-i1-store.ll
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pr16278.ll
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pr17529.ll
[NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc
2013-10-11 12:39:39 +00:00
ptx-version-30.ll
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ptx-version-31.ll
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refl1.ll
[NVPTX] Add support for selecting CUDA vs OCL mode based on triple
2013-06-21 18:51:49 +00:00
rotate.ll
[NVPTX] Add support for efficient rotate instructions on SM 3.2+
2014-06-27 18:35:33 +00:00
rsqrt.ll
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sched1.ll
Propagate DAG node ordering during type legalization and instruction selection
2013-03-20 00:10:32 +00:00
sched2.ll
Propagate DAG node ordering during type legalization and instruction selection
2013-03-20 00:10:32 +00:00
sext-in-reg.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
sext-params.ll
[NVPTX] Handle signext/zeroext attributes properly
2013-07-01 12:58:58 +00:00
shift-parts.ll
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simple-call.ll
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sm-version-20.ll
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sm-version-21.ll
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sm-version-30.ll
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sm-version-35.ll
[NVPTX] Add more precise PTX/SM target attributes
2012-11-12 03:16:43 +00:00
st-addrspace.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
st-generic.ll
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
2014-07-16 16:26:58 +00:00
surf-read-cuda.ll
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch
2014-07-17 11:59:04 +00:00
surf-read.ll
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surf-write-cuda.ll
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch
2014-07-17 11:59:04 +00:00
surf-write.ll
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symbol-naming.ll
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tex-read-cuda.ll
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch
2014-07-17 11:59:04 +00:00
tex-read.ll
[NVPTX] Add more surface/texture intrinsics, including CUDA unified texture fetch
2014-07-17 11:59:04 +00:00
texsurf-queries.ll
[NVPTX] Flag surface/texture query instructions with IsTexSurfQuery
2014-07-17 14:51:33 +00:00
tuple-literal.ll
[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.
2013-03-30 14:29:30 +00:00
vec8.ll
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vec-param-load.ll
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vector-args.ll
[NVPTX] Add support for vectorized function return values
2013-06-28 17:57:55 +00:00
vector-call.ll
[NVPTX] Add missing .v4 qualifier on vector store instruction
2014-07-17 16:58:56 +00:00
vector-compare.ll
Allow targets to prefer TypeSplitVector over TypePromoteInteger when computing the legalization method for vectors
2012-11-29 14:26:24 +00:00
vector-loads.ll
Propagate DAG node ordering during type legalization and instruction selection
2013-03-20 00:10:32 +00:00
vector-select.ll
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vector-stores.ll
Add a target legalize hook for SplitVectorOperand (again)
2013-07-26 13:28:29 +00:00
weak-global.ll
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weak-linkage.ll
[NVPTX] Emit .weak when linkage is not external, internal, or private
2014-06-27 18:35:10 +00:00