Jyotsna Verma d6c98ae638 Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h. ... Add HexagonMCInst class which adds various Hexagon VLIW annotations. In addition, this class also includes some APIs related to the constant extenders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175634 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-20 16:13:27 +00:00
..
absaddr-store.ll	Hexagon: Use multiclass for absolute addressing mode stores.	2013-02-05 18:15:34 +00:00
args.ll	Use multiclass to define store instructions with base+immediate offset	2012-12-05 19:32:03 +00:00
cext-check.ll	Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.	2013-02-20 16:13:27 +00:00
cmp_pred_reg.ll	Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle	2013-02-05 19:20:45 +00:00
cmp_pred.ll	Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle	2013-02-05 19:20:45 +00:00
cmp-to-genreg.ll	Hexagon: Add V4 compare instructions. Enable relationship mapping	2013-02-05 16:42:24 +00:00
cmp-to-predreg.ll	Hexagon: Add V4 compare instructions. Enable relationship mapping	2013-02-05 16:42:24 +00:00
cmpb_pred.ll	Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle	2013-02-05 19:20:45 +00:00
combine_ir.ll	Hexagon: Add V4 combine instructions and some more Def Pats for V2.	2013-02-04 15:52:56 +00:00
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll	Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.	2013-02-20 16:13:27 +00:00
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll	Hexagon: Use absolute addressing mode loads/stores for global+offset	2013-02-13 21:38:46 +00:00
gp-plus-offset-store.ll	Hexagon: Use absolute addressing mode loads/stores for global+offset	2013-02-13 21:38:46 +00:00
hwloop-cleanup.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-const.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-dbg.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-le.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-lt1.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-lt.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
hwloop-ne.ll	Extend Hexagon hardware loop generation to handle various additional cases:	2013-02-11 21:37:55 +00:00
idxload-with-zero-offset.ll	Hexagon: Test case to confirm generation of indexed loads with zero offset.	2013-02-01 16:40:06 +00:00
lit.local.cfg
macint.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
postinc-load.ll	In hexagon convertToHardwareLoop, don't deref end() iterator	2012-12-07 21:03:15 +00:00
postinc-store.ll	Hexagon: Add testcase for post-increment store instructions.	2013-02-05 18:23:51 +00:00
pred-absolute-store.ll	Hexagon: Add support to generate predicated absolute addressing mode	2013-02-12 16:06:23 +00:00
predicate-copy.ll	Hexagon: add support for predicate-GPR copies.	2013-02-13 22:56:34 +00:00
remove_lsr.ll
simpletailcall.ll
static.ll
struct_args_large.ll
struct_args.ll	Hexagon: Add V4 combine instructions and some more Def Pats for V2.	2013-02-04 15:52:56 +00:00
vaddh.ll
validate-offset.ll	Add indexed load/store instructions for offset validation check.	2013-01-17 18:42:37 +00:00