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llvm-6502/test/CodeGen/Mips
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Reed Kotler bb01b3cb93 Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175420 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-18 05:43:03 +00:00
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2008-06-05-Carry.ll
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2008-07-03-SRet.ll
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2008-07-06-fadd64.ll
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2008-07-07-Float2Int.ll
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2008-07-07-FPExtend.ll
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2008-07-07-IntDoubleConvertions.ll
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2008-07-15-InternalConstant.ll
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2008-07-15-SmallSection.ll
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2008-07-16-SignExtInReg.ll
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2008-07-22-Cstpool.ll
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2008-07-23-fpcmp.ll
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2008-07-29-icmp.ll
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2008-07-31-fcopysign.ll
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2008-08-01-AsmInline.ll
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2008-08-03-fabs64.ll
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2008-08-03-ReturnDouble.ll
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2008-08-04-Bitconvert.ll
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2008-08-06-Alloca.ll
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2008-08-07-CC.ll
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2008-08-07-FPRound.ll
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2008-08-08-bswap.ll
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2008-08-08-ctlz.ll
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2008-10-13-LegalizerBug.ll
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2008-11-10-xint_to_fp.ll
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2009-11-16-CstPoolLoad.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-07-20-Switch.ll
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2010-11-09-CountLeading.ll
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2010-11-09-Mul.ll
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2011-05-26-BranchKillsVreg.ll
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2012-12-12-ExpandMemcpy.ll
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addc.ll
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addi.ll
Add the 16 bit version of addiu. To the assembler, the 16 and 32 bit are the
2013-02-08 21:42:56 +00:00
addressing-mode.ll
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align16.ll
For Mips 16, add the optimization where the 16 bit form of addiu sp can be used
2013-02-13 20:28:27 +00:00
alloca16.ll
fix most of remaining issues with large frames.
2012-12-20 04:07:42 +00:00
alloca.ll
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
2012-12-20 04:06:06 +00:00
analyzebranch.ll
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and1.ll
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asm-large-immediate.ll
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atomic.ll
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atomicops.ll
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biggot.ll
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blockaddr.ll
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br-jmp.ll
Enable jumps when in -static mode.
2013-02-07 03:49:51 +00:00
brconeq.ll
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brconeqk.ll
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brconeqz.ll
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brconge.ll
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brcongt.ll
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brconle.ll
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brconlt.ll
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brconne.ll
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brconnek.ll
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brconnez.ll
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brdelayslot.ll
[mips] Set flag neverHasSideEffects flag on some of the floating point instructions.
2013-01-25 00:20:39 +00:00
brind.ll
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bswap.ll
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buildpairextractelementf64.ll
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check-noat.ll
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cmov.ll
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constantfp0.ll
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cprestore.ll
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div_rem.ll
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div.ll
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divrem.ll
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divu_remu.ll
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divu.ll
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double2int.ll
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dsp-r1.ll
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dsp-r2.ll
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eh-dwarf-cfa.ll
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eh-return32.ll
[mips] Test case for r173862.
2013-01-30 00:28:15 +00:00
eh-return64.ll
[mips] Test case for r173862.
2013-01-30 00:28:15 +00:00
eh.ll
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ex2.ll
Add test case for r170674
2012-12-21 00:55:10 +00:00
extins.ll
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fabs.ll
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fastcc.ll
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fcopysign-f32-f64.ll
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fcopysign.ll
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fmadd1.ll
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fneg.ll
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fp16static.ll
Make sure we call externals from libraries properly when -static.
2013-02-07 04:34:51 +00:00
fp-indexed-ls.ll
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fp-spill-reload.ll
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fpbr.ll
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frame-address.ll
This patch that sets the EmitAlias flag in td files
2013-02-05 08:32:10 +00:00
frem.ll
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global-address.ll
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global-pointer-reg.ll
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gpreg-lazy-binding.ll
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
2012-12-20 04:06:06 +00:00
gprestore.ll
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helloworld.ll
Fix minor mips16 issues in directives for function prologue. Probably this does
2013-02-15 01:04:38 +00:00
hf16_1.ll
The next phase of Mips16 hard float implementation.
2013-01-24 04:24:02 +00:00
i32k.ll
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i64arg.ll
[mips] Implement MipsRegisterInfo::getRegPressureLimit.
2013-01-22 21:34:25 +00:00
imm.ll
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indirectcall.ll
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init-array.ll
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inlineasm64.ll
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inlineasm_constraint.ll
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inlineasm-cnstrnt-bad-I-1.ll
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inlineasm-cnstrnt-bad-J.ll
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inlineasm-cnstrnt-bad-K.ll
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inlineasm-cnstrnt-bad-L.ll
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inlineasm-cnstrnt-bad-N.ll
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inlineasm-cnstrnt-bad-O.ll
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inlineasm-cnstrnt-bad-P.ll
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inlineasm-cnstrnt-reg64.ll
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inlineasm-cnstrnt-reg.ll
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inlineasm-operand-code.ll
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inlineasmmemop.ll
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internalfunc.ll
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jtstat.ll
Make jumptables work for -static
2013-02-13 08:32:14 +00:00
largefr1.ll
When Mips16 frames grow large, the immediate field may exceed the maximum
2013-02-08 03:57:41 +00:00
largeimm1.ll
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largeimmprinting.ll
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lb1.ll
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lbu1.ll
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lh1.ll
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lhu1.ll
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lit.local.cfg
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llcarry.ll
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load-store-left-right.ll
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longbranch.ll
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machineverifier.ll
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madd-msub.ll
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memcpy.ll
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mips16ex.ll
This patch is needed to make c++ exceptions work for mips16.
2012-12-16 04:00:45 +00:00
mips16fpe.ll
This code implements most of mips16 hardfloat as it is done by gcc.
2012-12-15 00:20:05 +00:00
mips64-expand-libcall.ll
[mips] Do not use function CC_MipsN_VarArg unless the function being analyzed
2013-02-05 21:18:11 +00:00
mips64-fp-indexed-ls.ll
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mips64-sret.ll
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
2012-12-20 04:06:06 +00:00
mips64countleading.ll
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mips64directive.ll
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mips64ext.ll
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mips64extins.ll
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mips64fpimm0.ll
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mips64fpldst.ll
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mips64imm.ll
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mips64instrs.ll
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mips64intldst.ll
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mips64lea.ll
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mips64load-store-left-right.ll
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mips64muldiv.ll
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mips64shift.ll
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mipslopat.ll
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misha.ll
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mul.ll
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mulll.ll
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mulull.ll
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neg1.ll
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not1.ll
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null.ll
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o32_cc_byval.ll
[mips] Implement MipsRegisterInfo::getRegPressureLimit.
2013-01-22 21:34:25 +00:00
o32_cc_vararg.ll
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o32_cc.ll
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or1.ll
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private.ll
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ra-allocatable.ll
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rdhwr-directives.ll
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rem.ll
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remat-immed-load.ll
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remu.ll
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return_address.ll
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
2012-12-20 04:06:06 +00:00
return-vector-float4.ll
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return-vector.ll
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rotate.ll
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sb1.ll
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select.ll
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selectcc.ll
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seleq.ll
Beginning of expanding all current mips16 macro/pseudo instruction sequences.
2013-02-18 00:59:04 +00:00
selgt.ll
Expand pseudo/macro BteqzT8SltX16.
2013-02-18 04:04:26 +00:00
selle.ll
Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.
2013-02-18 05:43:03 +00:00
selne.ll
Expand macro/pseudo BteqzT8CmpX16.
2013-02-18 03:06:29 +00:00
selpat.ll
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seteq.ll
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seteqz.ll
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setge.ll
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setgek.ll
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setle.ll
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setlt.ll
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setltk.ll
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setne.ll
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setuge.ll
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setugt.ll
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setule.ll
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setult.ll
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setultk.ll
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sh1.ll
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shift-parts.ll
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sitofp-selectcc-opt.ll
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sll1.ll
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sll2.ll
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small-section-reserve-gp.ll
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sra1.ll
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sra2.ll
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srl1.ll
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srl2.ll
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stacksize.ll
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stchar.ll
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stldst.ll
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sub1.ll
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sub2.ll
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swzero.ll
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tailcall.ll
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tls16_2.ll
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tls16.ll
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tls-alias.ll
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tls-models.ll
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tls.ll
[mips] Implement MipsRegisterInfo::getRegPressureLimit.
2013-01-22 21:34:25 +00:00
uitofp.ll
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ul1.ll
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unalignedload.ll
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vector-load-store.ll
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vector-setcc.ll
[mips] MipsTargetLowering::getSetCCResultType should return a vector type if
2013-01-04 20:06:01 +00:00
weak.ll
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xor1.ll
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zeroreg.ll
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