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bd48d31b37
Summary: Highlights: - Registers are resolved much later (by the render method). Prior to that point, GPR32's/GPR64's are GPR's regardless of register size. Similarly FGR32's/FGR64's/AFGR64's are FGR's regardless of register size or FR mode. Numeric registers can be anything. - All registers are parsed the same way everywhere (even when handling symbol aliasing) - One consequence is that all registers can be specified numerically almost anywhere (e.g. $fccX, $wX). The exception is symbol aliasing but that can be easily resolved. - Removes the need for the hasConsumedDollar hack - Parenthesis and Bracket suffixes are handled generically - Micromips instructions are parsed directly instead of going through the standard encodings first. - rdhwr accepts all 32 registers, and the following instructions that previously xfailed now work: ddiv, ddivu, div, divu, cvt.l.[ds], se[bh], wsbh, floor.w.[ds], c.ngl.d, c.sf.s, dsbh, dshd, madd.s, msub.s, nmadd.s, nmsub.s, swxc1 - Diagnostics involving registers point at the correct character (the $) - There's only one kind of immediate in MipsOperand. LSA immediates are handled by the predicate and renderer. Lowlights: - Hardcoded '$zero' in the div patterns is handled with a hack. MipsOperand::isReg() will return true for a k_RegisterIndex token with Index == 0 and getReg() will return ZERO for this case. Note that it doesn't return ZERO_64 on isGP64() targets. - I haven't cleaned up all of the now-unused functions. Some more of the generic parser could be removed too (integers and relocs for example). - insve.df needed a custom decoder to handle the implicit fourth operand that was needed to make it parse correctly. The difficulty was that the matcher expected a Token<'0'> but gets an Imm<0>. Adding an implicit zero solved this. Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3222 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205292 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
mips1 | ||
mips2 | ||
mips3 | ||
mips4 | ||
mips5 | ||
mips32 | ||
mips32r2 | ||
mips64 | ||
mips64r2 | ||
msa | ||
cfi.s | ||
cpsetup.s | ||
do_switch1.s | ||
do_switch2.s | ||
do_switch3.s | ||
eh-frame.s | ||
elf_basic.s | ||
elf_eflags_abicalls.s | ||
elf_eflags_micromips.s | ||
elf_eflags_mips16.s | ||
elf_eflags_noreorder.s | ||
elf_eflags_pic0.s | ||
elf_eflags_pic2.s | ||
elf_eflags.s | ||
elf_reginfo.s | ||
elf_st_other.s | ||
elf-bigendian.ll | ||
elf-gprel-32-64.s | ||
elf-N64.s | ||
elf-objdump.s | ||
elf-relsym.s | ||
elf-tls.s | ||
expr1.s | ||
higher_highest.ll | ||
hilo-addressing.s | ||
lit.local.cfg | ||
micromips-16-bit-instructions.s | ||
micromips-alias.s | ||
micromips-alu-instructions.s | ||
micromips-bad-branches.s | ||
micromips-branch16.s | ||
micromips-branch-instructions.s | ||
micromips-control-instructions.s | ||
micromips-diagnostic-fixup.s | ||
micromips-expansions.s | ||
micromips-expressions.s | ||
micromips-fpu-instructions.s | ||
micromips-jump26.s | ||
micromips-jump-instructions.s | ||
micromips-loadstore-instructions.s | ||
micromips-loadstore-unaligned.s | ||
micromips-movcond-instructions.s | ||
micromips-multiply-instructions.s | ||
micromips-pc16-fixup.s | ||
micromips-relocations.s | ||
micromips-shift-instructions.s | ||
micromips-tailr.s | ||
micromips-trap-instructions.s | ||
mips64-alu-instructions.s | ||
mips64-instructions.s | ||
mips64-register-names-n32-n64.s | ||
mips64-register-names-o32.s | ||
mips64eb-fixups.s | ||
mips64extins.ll | ||
mips64shift.ll | ||
mips_directives_bad.s | ||
mips_directives.s | ||
mips_gprel16.s | ||
mips-alu-instructions.s | ||
mips-bad-branches.s | ||
mips-control-instructions.s | ||
mips-coprocessor-encodings.s | ||
mips-data-directives.s | ||
mips-diagnostic-fixup.s | ||
mips-dsp-instructions.s | ||
mips-expansions.s | ||
mips-fpu-instructions.s | ||
mips-jump-instructions.s | ||
mips-memory-instructions.s | ||
mips-noat.s | ||
mips-pc16-fixup.s | ||
mips-register-names-invalid.s | ||
mips-register-names-o32.s | ||
mips-relocations.s | ||
multi-64bit-func.ll | ||
nabi-regs.s | ||
nacl-mask.s | ||
octeon-instructions.s | ||
pr11877.s | ||
r-mips-got-disp.s | ||
set-at-directive-explicit-at.s | ||
set-at-directive.s | ||
sext_64_32.ll | ||
sym-offset.ll | ||
xgot.s |