llvm-6502/include/llvm/CodeGen
Dan Gohman c8c2827993 Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor
some of the latency computation logic out of the SDNode
ScheduleDAG code into a TargetInstrItineraries helper method
to help with this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59761 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-21 00:12:10 +00:00
..
AsmPrinter.h
BreakCriticalMachineEdge.h
CallingConvLower.h
DAGISelHeader.h
DwarfWriter.h
ELFRelocation.h
FastISel.h
FileWriters.h
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
LatencyPriorityQueue.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalAnalysis.h
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineCodeEmitter.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h
MachineFunction.h
MachineFunctionPass.h
MachineInstr.h
MachineInstrBuilder.h
MachineJumpTableInfo.h
MachineLocation.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineOperand.h
MachinePassRegistry.h
MachineRegisterInfo.h
MachineRelocation.h
MachORelocation.h
Passes.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h
RegisterScavenging.h - Register scavenger should use MachineRegisterInfo and internal map to find the first use of a register after a given machine instruction. 2008-11-20 02:32:35 +00:00
RuntimeLibcalls.h
ScheduleDAG.h Factor out the code for verifying the work of the scheduler, 2008-11-20 01:26:25 +00:00
ScheduleDAGInstrs.h Implement ComputeLatency for MachineInstr ScheduleDAGs. Factor 2008-11-21 00:12:10 +00:00
ScheduleDAGSDNodes.h
SchedulerRegistry.h
SelectionDAG.h
SelectionDAGISel.h
SelectionDAGNodes.h Add UADDO and SADDO nodes. These will be used for determining an overflow 2008-11-21 00:11:16 +00:00
ValueTypes.h
ValueTypes.td